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SysCon_v0.1.vhd 2015-05-27 1.8 kB
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vHDL Obfuscator GUI - Ofuscador de código HDL

:::vhdl signal TXDATi : std_logic_vector(DAT_O'Range); alias TXRDYi : std_logic is TXDATi(14); signal RXDATi : std_logic_vector(DAT_I'Range); alias RXRDYi : std_logic is RXDATi(15); :::

'''vhdl signal TXDATi : std_logic_vector(DAT_O'Range); alias TXRDYi : std_logic is TXDATi(14); signal RXDATi : std_logic_vector(DAT_I'Range); alias RXRDYi : std_logic is RXDATi(15); '''

´´´vhdl signal TXDATi : std_logic_vector(DAT_O'Range); alias TXRDYi : std_logic is TXDATi(14); signal RXDATi : std_logic_vector(DAT_I'Range); alias RXRDYi : std_logic is RXDATi(15); ´´´

signal TXDATi : std_logic_vector(DAT_O'Range);
alias  TXRDYi : std_logic is TXDATi(14);
signal RXDATi : std_logic_vector(DAT_I'Range);
alias  RXRDYi : std_logic is RXDATi(15);
Source: readme.md, updated 2015-05-27