What would verilog code translated to unlambda look like? This question has puzzled me for a long time and I've decided to do a unlambda backend to my c->verilog compiler. Come to think of it, why stop at unlambda? I will go all the way to NAND gates.

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License

MIT License

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Additional Project Details

Languages

English

Intended Audience

Science/Research

Programming Language

C, VHDL/Verilog

Registered

2007-11-12