QtRvSim Files

• Machine: use cvector in instruction args to spedup decoding
• Machine: move controlstate to csr and prepare BitArg to be usd there
• Machine: use method for CSR writes to enable mutual register dependencies
• Machine: CSR: define mie register.
• Machine: CSR: fix conditions for register write and add mie to the list.
• Machine: fix range for branch instructions B-encoding
• CLI: add simple tracer for memory reads and writes.
• CLI: initial support to enable OS emulation even for CLI version
• GUI: update coreview graphics by Michal Stepanosvky
• GUI: fix wrong svg label connection and reset all to zero
• Students work was funded by RPAPS 2022 initiative at Czech Technical University in Prague Faculty of Electrical Engineering, https://fel.cvut.cz/
• We thanks for actual funding to Czech Technical University https://www.cvut.cz/

For Ubuntu use https://launchpad.net/~qtrvsimteam/+archive/ubuntu/ppa For SUSE, Fedora and Debian https://software.opensuse.org/download.html?project=home%3Ajdupak&package=qtrvsim For Arch https://aur.archlinux.org/pkgbase/qtrvsim Emscripten online version https://comparch.edu.cvut.cz/qtrvsim/app

QtRvSim articles, presentations and their recordings as well as more about Computer Architectures courses at the Czech Technical University in Prague are presented at https://comparch.edu.cvut.cz/

FOSDEM 2023 RISC-V devroom is the next chance for in-face meeting. The presentation QtRVSim—Education from Assembly to Pipeline, Cache Performance, and C Level Programming https://fosdem.org/2023/schedule/event/rv_qtrvsim/ is scheduled on Sunday February 5 at [09:40](https://fosdem.org/2023/schedule/day/sunday/#0940 (github.com) CET (UTC + 1). Streaming will be available as well.

The RISCV.otg (riscv.org) Academic and Training SIG online meeting on Thursday 19 at 8 AM Pacific (5 PM CEST) is another event where QtRvSim together with our materials for education will be presented together with hands-on session.