Open-source alternative partial reconfiguration flow for Xilinx FPGAs

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  • veerendranath Edited 2014-09-10
    Hello, I Could install OpenPR and generated bitstreams(XUPV5-changed make,proj,ucf files accordingly) for "counter" example but those are not working on device...? Please give some support contact to send error details/questions... Regards, Veerendranath
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Additional Project Details

Operating Systems

Linux

Languages

English

User Interface

Console/Terminal

Programming Language

C++, VHDL/Verilog

Related Categories

C++ Embedded Systems Software, VHDL/Verilog Embedded Systems Software

Registered

2011-04-26
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