mprfgen - Browse Files at SourceForge.net

The interactive file manager requires Javascript. Please enable it or use sftp or scp.
You may still browse the files here.

Name	Modified	Size	InfoDownloads / Week
README.mprfgen	2013-05-12	189 Bytes	1
Totals: 1 Item		189 Bytes	1

Dear user,

thank you for you interest.

mprfgen has been commercialized by Ajax Compilers: http://www.ajaxcompilers.com

Best regards,
Nikolaos Kavvadias
CEO
Ajax Compilers
Athens, Greece

Source: README.mprfgen, updated 2013-05-12

Other Useful Business Software

Our Free Plans just got better! | Auth0

With up to 25k MAUs and unlimited Okta connections, our Free Plan lets you focus on what you do best—building great apps.

You asked, we delivered! Auth0 is excited to expand our Free and Paid plans to include more options so you can focus on building, deploying, and scaling applications without having to worry about your security. Auth0 now, thank yourself later.

Try free now

Find Hidden Risks in Windows Task Scheduler

Free diagnostic script reveals configuration issues, error patterns, and security risks. Instant HTML report.

Windows Task Scheduler might be hiding critical failures. Download the free JAMS diagnostic tool to uncover problems before they impact production—get a color-coded risk report with clear remediation steps in minutes.

Download Free Tool

Recommended Projects

IP-XACT 2009/2014 Platform
Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files
xc3sprog
xc3sprog is a suite of utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under linux. Originally based on code written by Andrew Rogers (http://www.rogerstech.co.uk/ ).
Eclipse Verilog editor
Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.
SimFPGA
VHDL Verification and Simulation Tool
Alliance CAD System
Alliance CAD System is a free set of EDA tools and portable cell libraries for VLSI design. It covers the design flow from VHDL up to layout. It includes VHDL simulator, RTL synthesis, place and route, netlist extractor, DRC, layout editor.

mprfgen Files