| Name | Modified | Size | Downloads / Week |
|---|---|---|---|
| Parent folder | |||
| logisim-evolution-4.0.0-aarch64.dmg | 2025-09-07 | 79.9 MB | |
| logisim-evolution-4.0.0-aarch64.msi | 2025-09-07 | 75.0 MB | |
| logisim-evolution-4.0.0-all.jar | 2025-09-07 | 52.5 MB | |
| logisim-evolution-4.0.0-amd64.deb | 2025-09-07 | 69.3 MB | |
| logisim-evolution-4.0.0-amd64.msi | 2025-09-07 | 77.0 MB | |
| logisim-evolution-4.0.0-x86_64.dmg | 2025-09-07 | 81.2 MB | |
| logisim-evolution-4.0.0-x86_64.rpm | 2025-09-07 | 78.1 MB | |
| README.md | 2025-09-07 | 2.0 kB | |
| Version 4.0.0 source code.tar.gz | 2025-09-07 | 46.2 MB | |
| Version 4.0.0 source code.zip | 2025-09-07 | 48.7 MB | |
| Totals: 10 Items | 607.9 MB | 1 | |
- v4.0.0 (2025-09-07)
- Updated VHDL and created Verilog generator for RAM component with byte-enables
- Added VHDL and Verilog for the RAM component with line-enables
- fixed clasic appearance shift-register bug
- Added automatic custom Logisim library loading at startup.
- Created unit tests for loading custom Logisim libraries at startup.
- Updated documentation for the automatic loading of custom Logisim libraries.
- New take on project export/import. A zip-file is generated which can include a user provided "README.md".
- Added Telnet component.
- Added Metal graphics acceleration option.
- Added option to hide/show toolbar
- Improved drawing appearance.
- Fixed TTY appearance bug while changing various zoom levels.
- Corrected appearance of NOT gates in TikZ/SVG image export.
- Corrected disjoint corners in arrow-style Pins.
- Improved output of rectangles with rounded corners in TikZ image export.
- Fixed Undo/Redo issues.
- Fixed Power-on-Reset propagation issue.
- Redesigned simulation engine to fix synchronization issues and increase speed.
- Fixed synchronization and efficiency issues in wires and propagation.
- Fixed synchronization and efficiency issues in propagation listeners.
- Limited redraws to about 20 frames per second to reduce overhead.
- Allows users to choose a simulation queue, which changes the efficiency of the simulator depending on circuit design.
- Simplified Type and Behavior attributes of Pins.
- This change will break circuits with input pins that need to pull floating values to 0 but do not have the Pull Down setting. To fix it, set the Behavior attribute to Pull Down.
- Updated Pin documentation.
- Subcircuits with clock input(s) are now drawn with a clock symbol.
- Added TTL 74194: 4-bit bidirectional universal shift register.
- Improved the English, French, and German localization. Smaller fixes were done to the other languages as well.
