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FFT co-processor in Verilog based on the KISS FFT

User Ratings

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ease 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 5 / 5
features 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 5 / 5
design 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 5 / 5
support 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 5 / 5
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User Reviews

  • 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    Hi I wanted Exactly same thing Just written in VHDL. So, does anybody know Mixed radix (radix 2 and radix 4) core written in VHDL . Is this kind of core available??

    Posted 12/14/2014
  • 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    I Use This FFT in my project, and I find a bug. When FFT size is bigger than 1000(for example), the number set to xilinx core generator has the format like 1,000 , and this can not be recognized by core generator and report error(actually should be 1000). So I have to manually generate the myfft_twiddle_rom0.ngc file. Hope to solve this,Thanks!

    Posted 10/26/2014
  • 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    fast download and works, recommended.

    Posted 11/01/2012
  • 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    very good program belfft.

    Posted 09/22/2012

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