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FFT co-processor in Verilog based on the KISS FFT

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bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT ("Keep it simple, Stupid!"). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far AMBA AXI, Altera's Avalon bus and the Wishbone bus are supported. However, bel_fft's architecture allows an easy adaptation to further bus architectures (e.g. AMBA AHB). It comes with a Java wizard to configure the co-processor and to generate all required files (e.g. twiddle ROMs).
It comes with integration into Xilinx Vivado, EDK, and Altera QSYS and includes example designs for Xilinx Zynq and with PCI-Express core (including Linux driver and application).
bel_fft is distributed under the GNU Lesser Public License 2.1.

bel_fft Web Site


  • Mixed-radix FFT co-processor for (so far radix 4 and radix 2 are supported)
  • Master bus interface for memory access
  • Slave interface for configuration and control
  • Modular architecture
  • 32 bit AXI, Avalon and Wishbone interfaces, 64 bit AXI interface
  • 32 bit and 16 bit data types
  • Can be configured to support four different configurations
  • Configuration is done via a GUI
  • Twiddle factors as ROM(s)
  • Interrupt generation
  • Software compatible to Kiss FFT
  • Seamless integration into Xilinx Vivado, EDK, and Altera's QSYS
  • Written in Verilog
  • Example designs for Xilinx Zynq
  • Example design with PCI-Express Core for the Xilinx AC701 board with Linux driver and small application program


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Additional Project Details

Intended Audience


User Interface

Java Swing

Programming Language

VHDL/Verilog, Java



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