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This folder contains the RTL and Behavioral Models of 8 Approximate Adder Modules presented in DATE18:
B. S. Prabakaran, S. Rehman, M. A. Hanif, S. Ullah, G. Mazaheri, A. Kumar, M. Shafique, “DeMAS: An Efficient Design Methodology for Building Approximate Adders for FPGA-Based Systems”, IEEE/ACM 21st Design, Automation and Test in Europe Conference (DATE), March, 2018.

1. HW
   -> This directory contains the VHDL sources for all modules, including their test-benches.
   
2. SW
   -> This directory contains the MATLAB source-code for the corresponding behavioral models.

* For questions please email Prof. Dr.-Ing Muhammad Shafique (muhammad.shafique@tuwien.ac.at) or Bharath Srinivas Prabakaran (bharath.prabakaran@tuwien.ac.at).
Source: README.txt, updated 2018-03-19