From: valentin T. <val...@gm...> - 2012-01-30 18:38:33
|
Hi, To help you making first steps in zamia and git, we have created systemc branch it git and IG2SC.java in the instgrapgh package. Please find it at SourceForge. In Windows, we use msysgit and are always ready to help through Google Talk or skype with a fast response. But, surely you'll need to learn something about git yourself. You commit locally and guenter grants sourceforge repository write access. Perhaps, somebody else recommends a good location for your test suite classes. Best regards, valentin On 1/29/12, Saif Abrar <sye...@gm...> wrote: > Friends, > here is the updated ver2 VHDL-to-SystemC converter, supporting more > VHDL constructs and robust than earlier. > > Steps for using the VHDL-to-SysC converter: > - Merge the attached IG2DOT.java file with the file in your workspace, > in dir zamiacad/src/org/zamia/instgraph > - Now the SysC RTL can also be generated ! in addition to the already > existing IG2DOT dump. > - The IG2DOT functionality is tested by the file > zamiacad/test/org/zamia/instgraph/IGDumpTest.java > - This file instantiates AST2DOT and IG2DOT, as: > AST2DOT dot = new AST2DOT(arch); > IG2DOT dot = new IG2DOT(module); > - For the IG2DOT instance, there is a try-block that invokes the > IG2DOT convert method: > dot.convert(out); > After this line, invoke the VHDL-to-SysC convert method: > dot.sc_convert(aTestDir); > - So now the try-block will look like > try { > out = new PrintWriter(new BufferedWriter(new FileWriter(aIGDotFile))); > dot.convert(out); > dot.sc_convert(aTestDir); //VHDL to SystemC > logger.info("IGDumpTest: wrote dot file to %s", aIGDotFile); > } catch (IOException e) > > - Running the simulation will invoke the VHDL-to-SysC converter. > - For SysC, 2 files are generated in the same directory where the > BuildPath.txt is present: > sc_model.h > sc_model.cpp > > > Feel free to let me know your feedback. > > -- > Best regards, > Saif Abrar > Bangalore(India) > |