#2 complex type calculation

[kuenzerj]

A complex type calculation is not recognized:

constant bit_per_clk : positive := 2 ;
constant latency : natural := (y'length / bit_per_clk ) + 1 ;

signal count_reg : std_ulogic_vector(integer(ceil(log(real(latency), 2.0)))-1 downto 0);

There is an error telling me for count_reg "Type expected here."

Because the type is unknown every usage of this signal generates an error, too. Maybe a special internal "unknown" type could be used to suppress those subsequent errors.