[xtensa-cvscommit] linux/arch/xtensa/boot/images Makefile,1.1.1.1,1.2

[<joe...@us...>]

Update of /cvsroot/xtensa/linux/arch/xtensa/boot/images
In directory sc8-pr-cvs1:/tmp/cvs-serv13342/arch/xtensa/boot/images

Modified Files:
	Makefile 
Log Message:
The debug vector is no longer level 3, and the source code is now based on processor-config parameters.  This commit doesn't affect much since the debug vector is mapped into ROM (i.e., RedBoot).



Index: Makefile
===================================================================
RCS file: /cvsroot/xtensa/linux/arch/xtensa/boot/images/Makefile,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** Makefile	28 Aug 2002 16:10:13 -0000	1.1.1.1
--- Makefile	28 Apr 2003 23:21:10 -0000	1.2
***************
*** 9,14 ****
  		-R .ResetVector.text            \
  		-R .WindowVectors.literal       \
! 		-R .Level3InterruptVector.literal \
! 		-R .Level3InterruptVector.text  \
  		-R .UserExceptionVector.literal \
  		-R .KernelExceptionVector.literal \
--- 9,14 ----
  		-R .ResetVector.text            \
  		-R .WindowVectors.literal       \
! 		-R .DebugInterruptVector.literal \
! 		-R .DebugInterruptVector.text  \
  		-R .UserExceptionVector.literal \
  		-R .KernelExceptionVector.literal \
***************
*** 23,27 ****
  		-R .ResetVector.text		\
  		-R .WindowVectors.literal	\
! 		-R .Level3InterruptVector*	\
  		-R .debug*			\
  		-R .xt.insn			\
--- 23,27 ----
  		-R .ResetVector.text		\
  		-R .WindowVectors.literal	\
! 		-R .DebugInterruptVector*	\
  		-R .debug*			\
  		-R .xt.insn			\