[xtensa-cvscommit] linux/arch/xtensa/kernel setup.c,1.10,1.11
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[xtensa-cvscommit] linux/arch/xtensa/kernel setup.c,1.10,1.11
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From: <joe...@us...> - 2003-04-03 18:48:11
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Update of /cvsroot/xtensa/linux/arch/xtensa/kernel
In directory sc8-pr-cvs1:/tmp/cvs-serv17216/arch/xtensa/kernel
Modified Files:
setup.c
Log Message:
Change spaces to tabs due to peer pressure. Besides, everyone else is doing it. Just once won't hurt. If it feels good, do it. You'll be popular. :)
Index: setup.c
===================================================================
RCS file: /cvsroot/xtensa/linux/arch/xtensa/kernel/setup.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -C2 -d -r1.10 -r1.11
*** setup.c 1 Apr 2003 22:08:12 -0000 1.10
--- setup.c 3 Apr 2003 18:48:05 -0000 1.11
***************
*** 367,383 ****
/* high-level stuff */
seq_printf ( f,
! "processor : 0\n"
! "vendor : Tensilica\n"
! "arch : Xtensa\n"
! "release : " XCHAL_HW_RELEASE_NAME "\n"
! "core ID : " XCHAL_CORE_ID "\n"
! "build ID : 0x%x\n"
#if XCHAL_HAVE_BE
! "endianness : big\n"
#else
! "endianness : little\n"
#endif
! "cpu MHz : %u.%02u\n"
! "bogomips : %lu.%02lu\n",
XCHAL_BUILD_UNIQUE_ID,
clock_tick_rate/1000000,
--- 367,383 ----
/* high-level stuff */
seq_printf ( f,
! "processor\t: 0\n"
! "vendor\t\t: Tensilica\n"
! "arch\t\t: Xtensa\n"
! "release\t\t: " XCHAL_HW_RELEASE_NAME "\n"
! "core ID\t\t: " XCHAL_CORE_ID "\n"
! "build ID\t: 0x%x\n"
#if XCHAL_HAVE_BE
! "endianness\t: big\n"
#else
! "endianness\t: little\n"
#endif
! "cpu MHz\t\t: %u.%02u\n"
! "bogomips\t: %lu.%02lu\n",
XCHAL_BUILD_UNIQUE_ID,
clock_tick_rate/1000000,
***************
*** 390,398 ****
seq_printf ( f,
#if XCHAL_HAVE_WINDOWED
! "windowed regs : yes\n"
#else
! "windowed regs : no\n"
#endif
! "physical aregs : %d\n", XCHAL_NUM_AREGS);
/* interrupts */
--- 390,398 ----
seq_printf ( f,
#if XCHAL_HAVE_WINDOWED
! "windowed regs\t: yes\n"
#else
! "windowed regs\t: no\n"
#endif
! "physical aregs\t: %d\n", XCHAL_NUM_AREGS);
/* interrupts */
***************
*** 401,417 ****
seq_printf ( f,
#if XCHAL_HAVE_HIGHLEVEL_INTERRUPTS
! "HL ints : yes\n"
#else
! "HL ints : no\n"
#endif
#if XCHAL_HAVE_NMI
! "NMI int : yes\n"
#else
! "NMI int : no\n"
#endif
! "num ints : %d\n"
! "ext ints : %d\n"
! "int levels : %d\n"
! "timers : %d\n",
XCHAL_NUM_INTERRUPTS,
XCHAL_NUM_EXTINTERRUPTS,
--- 401,417 ----
seq_printf ( f,
#if XCHAL_HAVE_HIGHLEVEL_INTERRUPTS
! "HL ints\t\t: yes\n"
#else
! "HL ints\t\t: no\n"
#endif
#if XCHAL_HAVE_NMI
! "NMI int\t\t: yes\n"
#else
! "NMI int\t\t: no\n"
#endif
! "num ints\t: %d\n"
! "ext ints\t: %d\n"
! "int levels\t: %d\n"
! "timers\t\t: %d\n",
XCHAL_NUM_INTERRUPTS,
XCHAL_NUM_EXTINTERRUPTS,
***************
*** 423,454 ****
seq_printf ( f,
#if XCHAL_HAVE_OCD
! "ocd : yes\n"
#else
! "ocd : no\n"
#endif
! "ibreaks : %d\n"
! "dbreaks : %d\n"
! "debug int : %d\n",
XCHAL_NUM_IBREAK,
XCHAL_NUM_DBREAK,
XCHAL_DEBUGLEVEL);
#else
! seq_printf ( f, "debug : no\n");
#endif /* XCHAL_HAVE_DEBUG */
/* coprocessors */
#if XCHAL_HAVE_CP
! seq_printf ( f, "coprocessors : %d\n", XCHAL_CP_NUM);
#else
! seq_printf ( f, "coprocessors : none\n");
#endif
/* {I,D}{RAM,ROM} and XLMI */
seq_printf ( f,
! "inst ROMs : %d\n"
! "inst RAMs : %d\n"
! "data ROMs : %d\n"
! "data RAMs : %d\n"
! "XLMI ports : %d\n",
XCHAL_NUM_IROM,
XCHAL_NUM_IRAM,
--- 423,454 ----
seq_printf ( f,
#if XCHAL_HAVE_OCD
! "ocd\t\t: yes\n"
#else
! "ocd\t\t: no\n"
#endif
! "ibreaks\t\t: %d\n"
! "dbreaks\t\t: %d\n"
! "debug int\t: %d\n",
XCHAL_NUM_IBREAK,
XCHAL_NUM_DBREAK,
XCHAL_DEBUGLEVEL);
#else
! seq_printf ( f, "debug\t\t: no\n");
#endif /* XCHAL_HAVE_DEBUG */
/* coprocessors */
#if XCHAL_HAVE_CP
! seq_printf ( f, "coprocessors\t: %d\n", XCHAL_CP_NUM);
#else
! seq_printf ( f, "coprocessors\t: none\n");
#endif
/* {I,D}{RAM,ROM} and XLMI */
seq_printf ( f,
! "inst ROMs\t: %d\n"
! "inst RAMs\t: %d\n"
! "data ROMs\t: %d\n"
! "data RAMs\t: %d\n"
! "XLMI ports\t: %d\n",
XCHAL_NUM_IROM,
XCHAL_NUM_IRAM,
***************
*** 459,482 ****
/* cache */
seq_printf ( f,
! "icache line size : %d\n"
! "icache ways : %d\n"
! "icache size : %d\n"
#if XCHAL_ICACHE_LINE_LOCKABLE
! "icache lockable : yes\n"
#else
! "icache lockable : no\n"
#endif
! "dcache line size : %d\n"
! "dcache ways : %d\n"
! "dcache size : %d\n"
#if XCHAL_DCACHE_IS_WRITEBACK
! "dcache writeback : yes\n"
#else
! "dcache writeback : no\n"
#endif
#if XCHAL_DCACHE_LINE_LOCKABLE
! "dcache lockable : yes\n"
#else
! "dcache lockable : no\n"
#endif
"",
--- 459,482 ----
/* cache */
seq_printf ( f,
! "icache line size: %d\n"
! "icache ways\t: %d\n"
! "icache size\t: %d\n"
#if XCHAL_ICACHE_LINE_LOCKABLE
! "icache lockable\t: yes\n"
#else
! "icache lockable\t: no\n"
#endif
! "dcache line size: %d\n"
! "dcache ways\t: %d\n"
! "dcache size\t: %d\n"
#if XCHAL_DCACHE_IS_WRITEBACK
! "dcache writeback: yes\n"
#else
! "dcache writeback: no\n"
#endif
#if XCHAL_DCACHE_LINE_LOCKABLE
! "dcache lockable\t: yes\n"
#else
! "dcache lockable\t: no\n"
#endif
"",
***************
*** 490,501 ****
/* MMU */
seq_printf ( f,
! "ASID bits : %d\n"
! "ASID invalid : %d\n"
! "ASID kernel : %d\n"
! "rings : %d\n"
! "itlb ways : %d\n"
! "itlb AR ways : %d\n"
! "dtlb ways : %d\n"
! "dtlb AR ways : %d\n",
XCHAL_MMU_ASID_BITS,
XCHAL_MMU_ASID_INVALID,
--- 490,501 ----
/* MMU */
seq_printf ( f,
! "ASID bits\t: %d\n"
! "ASID invalid\t: %d\n"
! "ASID kernel\t: %d\n"
! "rings\t\t: %d\n"
! "itlb ways\t: %d\n"
! "itlb AR ways\t: %d\n"
! "dtlb ways\t: %d\n"
! "dtlb AR ways\t: %d\n",
XCHAL_MMU_ASID_BITS,
XCHAL_MMU_ASID_INVALID,
***************
*** 510,578 ****
seq_printf ( f,
#if XCHAL_HAVE_DENSITY
! "code density : yes\n"
#else
! "code density : no\n"
#endif
#if XCHAL_HAVE_BOOLEANS
! "booleans : yes\n"
#else
! "booleans : no\n"
#endif
#if XCHAL_HAVE_LOOPS
! "loops : yes\n"
#else
! "loops : no\n"
#endif
#if XCHAL_HAVE_NSA
! "nsa : yes\n"
#else
! "nsa : no\n"
#endif
#if XCHAL_HAVE_MINMAX
! "min max : yes\n"
#else
! "min max : no\n"
#endif
#if XCHAL_HAVE_SEXT
! "sext : yes\n"
#else
! "sext : no\n"
#endif
#if XCHAL_HAVE_CLAMPS
! "clamps : yes\n"
#else
! "clamps : no\n"
#endif
#if XCHAL_HAVE_MAC16
! "mac16 : yes\n"
#else
! "mac16 : no\n"
#endif
#if XCHAL_HAVE_MUL16
! "mul16 : yes\n"
#else
! "mul16 : no\n"
#endif
#if XCHAL_HAVE_MUL32
! "mul32 : yes\n"
#else
! "mul32 : no\n"
#endif
#if XCHAL_HAVE_MUL32_HIGH
! "mul32 high : yes\n"
#else
! "mul32 high : no\n"
#endif
#if XCHAL_HAVE_FP
! "fpu : yes\n"
#else
! "fpu : no\n"
#endif
#if XCHAL_HAVE_SPECULATION
! "speculation : yes\n"
#else
! "speculation : no\n"
#endif
! "misc regs : %d\n",
XCHAL_NUM_MISC_REGS);
--- 510,578 ----
seq_printf ( f,
#if XCHAL_HAVE_DENSITY
! "code density\t: yes\n"
#else
! "code density\t: no\n"
#endif
#if XCHAL_HAVE_BOOLEANS
! "booleans\t: yes\n"
#else
! "booleans\t: no\n"
#endif
#if XCHAL_HAVE_LOOPS
! "loops\t\t: yes\n"
#else
! "loops\t\t: no\n"
#endif
#if XCHAL_HAVE_NSA
! "nsa\t\t: yes\n"
#else
! "nsa\t\t: no\n"
#endif
#if XCHAL_HAVE_MINMAX
! "min max\t\t: yes\n"
#else
! "min max\t\t: no\n"
#endif
#if XCHAL_HAVE_SEXT
! "sext\t\t: yes\n"
#else
! "sext\t\t: no\n"
#endif
#if XCHAL_HAVE_CLAMPS
! "clamps\t\t: yes\n"
#else
! "clamps\t\t: no\n"
#endif
#if XCHAL_HAVE_MAC16
! "mac16\t\t: yes\n"
#else
! "mac16\t\t: no\n"
#endif
#if XCHAL_HAVE_MUL16
! "mul16\t\t: yes\n"
#else
! "mul16\t\t: no\n"
#endif
#if XCHAL_HAVE_MUL32
! "mul32\t\t: yes\n"
#else
! "mul32\t\t: no\n"
#endif
#if XCHAL_HAVE_MUL32_HIGH
! "mul32 high\t: yes\n"
#else
! "mul32 high\t: no\n"
#endif
#if XCHAL_HAVE_FP
! "fpu\t\t: yes\n"
#else
! "fpu\t\t: no\n"
#endif
#if XCHAL_HAVE_SPECULATION
! "speculation\t: yes\n"
#else
! "speculation\t: no\n"
#endif
! "misc regs\t: %d\n",
XCHAL_NUM_MISC_REGS);
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