[xtensa-cvscommit] linux/arch/xtensa/mm mmu.c,1.7,1.8

[<joe...@us...>]

Update of /cvsroot/xtensa/linux/arch/xtensa/mm
In directory sc8-pr-cvs1:/tmp/cvs-serv18775/arch/xtensa/mm

Modified Files:
	mmu.c 
Log Message:

Replace the 'iitlba' and 'idtlba' instructions (though disable the replacement for now).  Various code improvements based on recent core.h additions.  Answer and remove several XTFIXME comments.

Index: mmu.c
===================================================================
RCS file: /cvsroot/xtensa/linux/arch/xtensa/mm/mmu.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -C2 -d -r1.7 -r1.8
*** mmu.c	5 Mar 2003 17:57:45 -0000	1.7
--- mmu.c	11 Mar 2003 19:16:56 -0000	1.8
***************
*** 22,35 ****
  
  
! /*  Called from arch-indep. files:  */
  
  
  void flush_tlb_all (void)
  {
  	unsigned long flags;
  	save_and_cli (flags);
  	__asm__ __volatile__ ("iitlba\n\t"
  			      "idtlba\n\t"
  			      "isync\n\t"); /* isync includes dsync */
  	restore_flags (flags);
  }
--- 22,66 ----
  
  
! static inline void xtensa_flush_all_itlb (void)
! {
! 	int way, index;
! 
! 	for (way = 0; way < XCHAL_ITLB_ARF_WAYS; way++) {
! 		for (index = 0; index < ITLB_ENTRIES_PER_ARF_WAY; index++) {
! 			int entry = way + (index << PAGE_SHIFT);
! 			invalidate_itlb_entry_no_isync (entry);
! 		}
! 	}
! 	asm volatile ("isync\n");
! }
! 
! static inline void xtensa_flush_all_dtlb (void)
! {
! 	int way, index;
! 
! 	for (way = 0; way < XCHAL_DTLB_ARF_WAYS; way++) {
! 		for (index = 0; index < DTLB_ENTRIES_PER_ARF_WAY; index++) {
! 			int entry = way + (index << PAGE_SHIFT);
! 			invalidate_dtlb_entry_no_isync (entry);
! 		}
! 	}
! 	asm volatile ("isync\n");
! }
  
  
+ /*  Called from arch-indep. files:  */
+ 
  void flush_tlb_all (void)
  {
  	unsigned long flags;
  	save_and_cli (flags);
+ #if 1
  	__asm__ __volatile__ ("iitlba\n\t"
  			      "idtlba\n\t"
  			      "isync\n\t"); /* isync includes dsync */
+ #else
+ 	xtensa_flush_all_itlb();
+ 	xtensa_flush_all_dtlb();
+ #endif
  	restore_flags (flags);
  }
***************
*** 65,69 ****
  		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
  
! 		if (size <= NTLB_ENTRIES) {
  			int oldpid = get_rasid_register();
  			set_rasid_register (ASID_INSERT(mm->context));
--- 96,100 ----
  		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
  
! 		if (size <= SMALLEST_NTLB_ENTRIES) {
  			int oldpid = get_rasid_register();
  			set_rasid_register (ASID_INSERT(mm->context));
***************
*** 210,280 ****
  
  
- /* ** WARNING ** Before enabling XT2000_MMU_DUMP debugging, ensure the
-    ** xtlb[i].indicies values are correct.  We do not (yet) retrieve
-    ** that information from the CHAL. */
- 
  #define XT2000_MMU_DUMP  1
  
  #if (XT2000_MMU_DUMP == 1)
  
- /* XTFIXME: All of the values in the way_config_t tables should
-  * somehow come from the CHAL.  The hard-coded numbers reflect a
-  * T1050 version with 8 entries per autorefill way. */
- 
- #define _ITLB_INDICIES_PER_ARF_WAY  8
- #define _DTLB_INDICIES_PER_ARF_WAY  8
- 
  #define USE_ITLB  0
  #define USE_DTLB  1
  
- #define WAY_TYPE_AUTOREFILL  0
- #define WAY_TYPE_STATIC      1
- #define WAY_TYPE_WIRED       2
- 
  struct way_config_t {
  	int indicies;
  	int indicies_log2;
  	int pgsz_log2;
! 	int type;
  };
  
  static struct way_config_t itlb[XCHAL_ITLB_WAYS] = 
  { 
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 4, 2, 20, WAY_TYPE_WIRED },
! 	{ 2, 1, 27, WAY_TYPE_STATIC },
! 	{ 2, 1, 28, WAY_TYPE_STATIC }
  };
  
  static struct way_config_t dtlb[XCHAL_DTLB_WAYS] = 
  { 
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 8, 3, 12, WAY_TYPE_AUTOREFILL },
! 	{ 4, 2, 20, WAY_TYPE_WIRED },
! 	{ 2, 1, 27, WAY_TYPE_STATIC },
! 	{ 2, 1, 28, WAY_TYPE_STATIC },
! 	{ 1, 0, 12, WAY_TYPE_WIRED },
! 	{ 1, 0, 12, WAY_TYPE_WIRED },
! 	{ 1, 0, 12, WAY_TYPE_WIRED }
  };
  
! static char *way_type (int type)
  {
! 	static char autorefill_str[] = "autorefill";
! 	static char static_str[] = "static";
! 	static char wired_str[] = "wired";
! 	static char unknown_str[] = "unknown";
! 
! 	switch (type) {
! 	case WAY_TYPE_AUTOREFILL: return autorefill_str;
! 	case WAY_TYPE_WIRED:      return wired_str;
! 	case WAY_TYPE_STATIC:     return static_str;
! 	default:                  return unknown_str;
! 	}
  }
  
--- 241,349 ----
  
  
  #define XT2000_MMU_DUMP  1
  
  #if (XT2000_MMU_DUMP == 1)
  
  #define USE_ITLB  0
  #define USE_DTLB  1
  
  struct way_config_t {
  	int indicies;
  	int indicies_log2;
  	int pgsz_log2;
! 	int arf;
  };
  
  static struct way_config_t itlb[XCHAL_ITLB_WAYS] = 
  { 
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY0_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY0_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY0_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY0_SET, ARF)
! 	},
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY1_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY1_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY1_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY1_SET, ARF)
! 	},
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY2_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY2_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY2_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY2_SET, ARF)
! 	},
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY3_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY3_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY3_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY3_SET, ARF)
! 	},
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY4_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY4_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY4_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY4_SET, ARF)
! 	},
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY5_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY5_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY5_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY5_SET, ARF)
! 	},
! 	{ XCHAL_ITLB_SET(XCHAL_ITLB_WAY6_SET, ENTRIES), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY6_SET, ENTRIES_LOG2), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY6_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_ITLB_SET(XCHAL_ITLB_WAY6_SET, ARF)
! 	}
  };
  
  static struct way_config_t dtlb[XCHAL_DTLB_WAYS] = 
  { 
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY0_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY0_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY0_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY0_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY1_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY1_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY1_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY1_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY2_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY2_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY2_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY2_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY3_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY3_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY3_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY3_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY4_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY4_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY4_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY4_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY5_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY5_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY5_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY5_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY6_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY6_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY6_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY6_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY7_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY7_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY7_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY7_SET, ARF)
! 	},
! 	{ XCHAL_DTLB_SET(XCHAL_DTLB_WAY8_SET, ENTRIES), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY8_SET, ENTRIES_LOG2), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY8_SET, PAGESZ_LOG2_MIN), 
! 	  XCHAL_DTLB_SET(XCHAL_DTLB_WAY8_SET, ARF)
! 	}
  };
  
! static inline char *way_type (int type)
  {
! 	return type ? "autorefill" : "non-autorefill";
  }
  
***************
*** 327,331 ****
  		printk ("\nWay: %d, Entries: %d, MinPageSize: %d, Type: %s\n",
  			way, itlb[way].indicies,
! 			itlb[way].pgsz_log2, way_type(itlb[way].type));
  		for (index = 0; index < itlb[way].indicies; index++) {
  			print_itlb_entry(&itlb[way], way, index);
--- 396,400 ----
  		printk ("\nWay: %d, Entries: %d, MinPageSize: %d, Type: %s\n",
  			way, itlb[way].indicies,
! 			itlb[way].pgsz_log2, way_type(itlb[way].arf));
  		for (index = 0; index < itlb[way].indicies; index++) {
  			print_itlb_entry(&itlb[way], way, index);
***************
*** 343,347 ****
  		printk ("\nWay: %d, Entries: %d, MinPageSize: %d, Type: %s\n",
  			way, dtlb[way].indicies,
! 			dtlb[way].pgsz_log2, way_type(dtlb[way].type));
  		for (index = 0; index < dtlb[way].indicies; index++) {
  			print_dtlb_entry(&dtlb[way], way, index);
--- 412,416 ----
  		printk ("\nWay: %d, Entries: %d, MinPageSize: %d, Type: %s\n",
  			way, dtlb[way].indicies,
! 			dtlb[way].pgsz_log2, way_type(dtlb[way].arf));
  		for (index = 0; index < dtlb[way].indicies; index++) {
  			print_dtlb_entry(&dtlb[way], way, index);