[xtensa-cvscommit] linux/include/asm-xtensa pgtable.h,1.8,1.9

[<jn...@us...>]

Update of /cvsroot/xtensa/linux/include/asm-xtensa
In directory sc8-pr-cvs1:/tmp/cvs-serv32016/include/asm-xtensa

Modified Files:
	pgtable.h 
Log Message:


Fixed two fundamental problems with writeback cache plus cache
aliasing.

1) set_pte -- When writing to a pte, that pte may be mapped into the
              pagetable, and it may be aliased.  It's important that the
	      pte when written be flushed back to memory so that when the
	      autorefill happens, it will read the fresh copy.
	      It would probably be more efficient to allocate these pages of
	      ptes as writethru instead of writing back the line everytime
	      set_pte happens.

2) copy_user_page -- There are facilities to make the to and address parameters
		     unaliased, but there isn't for the from address.  So it seems that
		     there is the chance that any writes that happened to the from page,
		     may be in a different cache line.  It seems necessart to force the
		     data cache to be written back at this point.


Index: pgtable.h
===================================================================
RCS file: /cvsroot/xtensa/linux/include/asm-xtensa/pgtable.h,v
retrieving revision 1.8
retrieving revision 1.9
diff -C2 -d -r1.8 -r1.9
*** pgtable.h	28 Feb 2003 01:53:10 -0000	1.8
--- pgtable.h	5 Mar 2003 17:57:46 -0000	1.9
***************
*** 345,348 ****
--- 345,356 ----
  {
  	*ptep = pteval;
+ #if (XCHAL_DCACHE_IS_WRITEBACK > 0) && (XTENSA_CACHE_ALIAS > 0)
+ 	{
+ 	    unsigned long flags;
+ 	    save_and_cli(flags);
+ 	    xthal_dcache_line_writeback((void*)ptep);
+ 	    restore_flags(flags);
+ 	}
+ #endif
  }