[xtensa-cvscommit] linux/arch/xtensa/boot/boot-redboot bootstrap.S,1.1.1.1,1.2
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zankel
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From: <jn...@us...> - 2003-03-01 03:02:51
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Update of /cvsroot/xtensa/linux/arch/xtensa/boot/boot-redboot In directory sc8-pr-cvs1:/tmp/cvs-serv23639 Modified Files: bootstrap.S Log Message: Fixed a bug that where the kernel wouldn't always boot when writeback caches were enabled. This is the "it works every other time bug." Now it should work every time. Index: bootstrap.S =================================================================== RCS file: /cvsroot/xtensa/linux/arch/xtensa/boot/boot-redboot/bootstrap.S,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** bootstrap.S 28 Aug 2002 16:10:13 -0000 1.1.1.1 --- bootstrap.S 1 Mar 2003 03:02:46 -0000 1.2 *************** *** 3,6 **** --- 3,7 ---- #include <xtensa/config/specreg.h> #include <xtensa/config/core.h> + #include <xtensa/cacheasm.h> /* * RB-Data: RedBoot data/bss *************** *** 66,69 **** --- 67,71 ---- /* XTFIXME workaround (bug in assembler: addi a0, a0, ... doesn't work) */ + addi a4, a0, __start - __start_a0 mov.n a0, a4 *************** *** 91,102 **** blt a8, a5, 1b - ## XTFIXME: flush d-caches (WB-caches) ! /* invalidate i-caches */ ! ! mov.n a6, a0 ! 2: dhi a6, 0 ! addi a6, a6, XCHAL_ICACHE_LINESIZE ! blt a6, a5, 2b movi a11, _reloc --- 93,107 ---- blt a8, a5, 1b ! /* 28feb2003 jn -- ! * I changed this to use the nice macros provided, it's ! * a bit of overkill because you don't really need to flush ! * the entire cache, just the regions to where we just copied ! * the code. ! */ ! #if XCHAL_DCACHE_IS_WRITEBACK ! dcache_writeback_all a5, a6 ! #endif ! icache_invalidate_all a5, a6 movi a11, _reloc *************** *** 166,169 **** --- 171,183 ---- /* jump to the kernel */ + + + /* 28feb2003 -- jn + * we just copied the kernel, it might be wise + * at this point to flush the caches, no? + */ + dcache_writeback_all a5, a6 + icache_invalidate_all a5, a6 + /* movi a2, _param_start */ |