I have finished implementing the fixed-point load/store unit.
This "unit" is what provides all general-purpose <-> memory transfers, for now i am not going to implement the CR[SF]
flag as i do not expect any code for the Xenon processor uses 32-bit mode, i am also not implementing the CR[LE]
flag as i don't expect anyone using little-endian mode either, if it turns out that software uses these modes anyway i will implement them.
The only fixed-point load/store instructions currently not implemented are the DS forms of ldw and stdw as i could not find good documentation on them.
Now i have finished the load/store unit i will go on to write the fixed-point ALU which provides all fixed-point mathemathical and logical operations.