Re: [Xc3sprog-users] Virtex 7 V2000T series support

[Uwe B. <bo...@el...>]

>>>>> "lyf4" == lyf4 Science <ly...@gm...> writes:

    lyf4> Hi Owe, yes it is 24 bit.

    lyf4> The bsd file is available at Xilinx site.

    lyf4> I have few queries with xc3sprog source.

    lyf4> 1. What does the variable tck_len and array_transfer_len stands
    lyf4> for ?

    lyf4> I consider it as, tck_len = IR length and array_transfer_len is
    lyf4> default 32.

    lyf4> 2. After every shitIR() invoked there invoked a function 
    lyf4> jtag->cycleTCK (<cycle_values>). What it is used for ?

    lyf4> 3. jtag->shiftDR() denotes the 3rd argument as length which was in
    lyf4> bits or bytes ?

    lyf4> 4. What is the difference between flow_program_legacy() and the
    lyf4> flow_array_program() functions ?

    lyf4> 5. Is flow_enable() and flow_disable() mandatory for the
    lyf4> programming sequence ?

These names and values are from the 1532 bsd files, like
Xilinx/14.6/ISE_DS/ISE/spartan6/data/xc6slx4_1532.bsd

Try to understand how the values given in xc3sprog are determined from the
values in the 1532 file,  minus eventual errors not yet noticed.

14.6 doesn't contain a 1532 file for V2000. Does vivado contain a 1532 file?
If not, look at a e.g. V7 1532 file, like
.../ISE/virtex7/data/xc7vx415t_1532.bsd

Transfer for your device.

And please send diffs.

Bye
-- 
Uwe Bonnes                bo...@el...

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
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