From: Luis A. G. <gua...@gm...> - 2013-09-15 18:34:10
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2013/9/15 Joris van Rantwijk <jor...@jo...>: > Hi Luis, > Hi Joris, > On 2013-09-15, Luis Alberto Guanuco wrote: >> The output xc3sprog write the message "Programming does not end at >> block boundary (nbits = 1047616), padding". > > It is not an error message. > XC3Sprog has noticed that the BIT file does not precisely fill a number > of blocks in the PROM, so it adds 0xff in the last block. This is normal. > > Is the FPGA booting correctly from the PROM? > I can not to program the PROM correctly but I can to program the FPGA directly. I was read the "manual page site" and I try to program the memory... luis@luis-laptop:build$ ./xc3sprog -v -c ftdiphr s3board_prom.mcs:W:0:MCS: -p 1 -R XC3SPROG (c) 2004-2011 xc3sprog project $Rev: 747 $ OS: Linux ... Using devlist.txt Using cablelist.txt Cable ftdiphr type ftdi VID 0x0403 PID 0x6010 dbus data 00 enable 0b cbus data 00 data 00 Using Libftdi, Using JTAG frequency 6.000 MHz from undivided clock JTAG chainpos: 1 Device IDCODE = 0x05045093 Desc: XCF02S Programming does not end at block boundary (nbits = 1047616), padding Programming block 255/ 256 at XCF frame 0x1fe0.done Programming time 2817.2 ms Verify block 255/ 256 at XCF frame 0x1fe0 Success! Verify time 792.9 ms USB transactions: Write 779 read 772 retries 1762 but when I change the FPGA boot mode (M[2:0] from JTAG to Master Serial) seems that the PROM doesn't load to the FPGA. Any suggestions? Regards, Luis > Joris. -- P Antes de imprimir, piense en su responsabilidad y compromiso con el MEDIO AMBIENTE |