Re: [Xc3sprog-users] bscan 59a6 bug

[Uwe B. <bo...@el...>]

>>>>> "joosteto" == joosteto  <joo...@gm...> writes:

...
    joosteto> I actually proposed two fixes (maybe I sent too many emails to
    joosteto> the list...), the second was to fix the scan*.vhdl FPGA code,
    joosteto> and reset the header data whenever it sets have_header to 0.

Probably other thing draw my attention.

    joosteto> The advantage of that fix is that old scan*.bit files will
    joosteto> still work (just not with the 59a6 data), and no fix to the
    joosteto> .cpp files need to be applied.

    joosteto> Here's the relavant part of my email from june the 6th again
    joosteto> (reworded):

    joosteto> Another (more backward compatible) fix would be making the
    joosteto> bscan code reset the read header each time it sets
    joosteto> "have_header<='0'".

    joosteto> I modified my bscan_s3_spi_isf.vhdl as described below (with
    joosteto> the old 59a659a6 magic); and now I can upload files with 59a6
    joosteto> in them (and any other data I tried).

    joosteto> Here's my bscan_s3_spi_isf.vhdl:
    joosteto> http://tech.komputilo.org/images/1/12/Bscan_s3_spi_isf-reset.vhdl

    joosteto> The relevant part (I had to change a lot more to make it work
    joosteto> for my xcs3s500e FPGA) of the patch is:

Two problems:
- "I had to change a lot more to make it work" doesn't sound good. Please
explain the problems or explain why they don't generally apply
- I have to rewrite your patch for Verilog, so can you explain what
"header <= (0=> TDI, others=>'0');" does?

Bye

-- 
Uwe Bonnes                bo...@el...

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
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