Re: [Xc3sprog-users] ioxpc.cpp buffer size and burst read details

[Raul F. <rfa...@gm...>]

Hello Joris,

sorry, the last e-mail was still a draft and was sent by mistake. I'm
re-issuing it here with this initial words and a link below.

I'm answering inline...

On Sun, Feb 12, 2012 at 9:02 PM, Raul Fajardo <rfa...@gm...> wrote:

>
> Am 12.02.2012 17:41 schrieb "Joris van Rantwijk" <jor...@jo...>:
>
> >
> > Hi Raul,
> >
> > Thanks for your information about the DLC9 programming cable.
> > Unfortunately I know very little about the inner workings of the XPC
> > driver. I hope that someone with hands-on experience will comment on
> > your email.
> > Uwe?
> >
> > Indeed, our projects should keep in touch in order to benefit from each
> > others improvements. It may even be useful to have a common library
> > which handles the various types of programming cables and offers basic
> > JTAG operations as an API. If UrJTAG, XC3SPROG, adv_jtag_bridge and
> > others bundle forces, we could share the burden of cable driver
> > development.
>
I totally agree that we should share the burden. I am not maintainer of
adv_jtag_bridge but Im probably its biggest user. But I have noticed
problems with xpc usb for too long and decided thus to take the matter in
my own hands.

Its maintainer explicitly stated that he would switch to a libjtag
implementation which used to be a goal of urjtag. I dont know the libjtag
status though.

I also dropped an email to urjtag forum about my findings to allow us all
to progress at the same pace.

>  >
> > On 2012-02-09, Raul Fajardo wrote:
> > > You considered an amount of read bits of more than 32 bits to be
> > > automatically aligned. That is true if you keep a base 32 number
> > > while a received transfer of 35 bits will not be aligned as I noticed.
> >
> > Our XPC code came from the UrJTAG project. Their code is consistent
> > with your interpretation, i.e. transfers larger than 32 bits also need
> > re-alignment of the final partial block.
> >
> > However, it seems that we have seen some evidence that transfers larger
> > than 32 bits must NOT be re-aligned:
> >
> http://xc3sprog.svn.sourceforge.net/viewvc/xc3sprog?view=revision&revision=476
>
That is also stated as a comment in the code. It could be that transfers
longer than 32 bits ended up having lengthes of multiple of 32 bits.
Different usages of the driver will end up exercising the driver ib
different ways and maybe xpc3sprog uses mostly transfer lengthes multiple
of 32 bits.

However, adv_jtag_bridge did not do that. Thus, I noticed that the
remaining bits of a modulo 32 operation on the bit length always have to be
realigned. All earlier bits dont however.

I tried to restate (in comments) the behavior of the cable in order to
explain this. From a hardware designer perspective, it would be extremely
unusual if alignment of data would dynamically depend on the length of the
data. As said before, every 32 bit block is aligned, following a last block
aligned if 32 or unaligned if something else.

> >
> > > *Issue 2)* Your defined buffer level of the CPLD could not be used on
> > > my cable.
> >
> > UrJTAG uses #define XPC_A6_CHUNKSIZE (4)
> > which is even more conservative than what you recommend.
> >
> > I'm not sure where we picked up our version of CHUNKSIZE.
> > Again, I hope a more experienced developer can help out ...
>
Of course, more testing is always good. But people often skip feedback.

Again, fortunatelly, adv_jtag_bridge usage of the driver was indeed going
on the limits of the buffer. Thus, it was blocking the cable on lengths
exactly above 4096 bytes and working fine for less/equal.

>  >
> > Is it possible that there are subtle differences between
> > cables/firmwares? What is the exact type of cable that you tested with?
>
I believe it was exactly the one your driver should work on, DLC9. But I
will take a look again tomorrow.

Answering Uwe's request about allowance to use the code. You are very
welcone to use my adaptations as you please. The code can be found under
the link below.

http://opencores.org/websvn,filedetails?repname=adv_debug_sys&path=%2Fadv_debug_sys%2Ftrunk%2FSoftware%2Fadv_jtag_bridge%2Fcable_xpc_dlc9.c

I am sorry that I dont have a patch for you. I never used your software, so
it would be difficult for me to test.

Kind regards,

Raul


>
> > Kind regards, Joris.
>