Re: [Xc3sprog-users] ioxpc.cpp buffer size and burst read details

[Joris v. R. <jor...@jo...>]

Hi Raul,

Thanks for your information about the DLC9 programming cable.
Unfortunately I know very little about the inner workings of the XPC
driver. I hope that someone with hands-on experience will comment on
your email.
Uwe?

Indeed, our projects should keep in touch in order to benefit from each
others improvements. It may even be useful to have a common library
which handles the various types of programming cables and offers basic
JTAG operations as an API. If UrJTAG, XC3SPROG, adv_jtag_bridge and
others bundle forces, we could share the burden of cable driver
development.

On 2012-02-09, Raul Fajardo wrote:
> You considered an amount of read bits of more than 32 bits to be
> automatically aligned. That is true if you keep a base 32 number
> while a received transfer of 35 bits will not be aligned as I noticed.

Our XPC code came from the UrJTAG project. Their code is consistent
with your interpretation, i.e. transfers larger than 32 bits also need
re-alignment of the final partial block.

However, it seems that we have seen some evidence that transfers larger
than 32 bits must NOT be re-aligned:
http://xc3sprog.svn.sourceforge.net/viewvc/xc3sprog?view=revision&revision=476

> *Issue 2)* Your defined buffer level of the CPLD could not be used on
> my cable.

UrJTAG uses #define XPC_A6_CHUNKSIZE (4)
which is even more conservative than what you recommend.

I'm not sure where we picked up our version of CHUNKSIZE.
Again, I hope a more experienced developer can help out ...

Is it possible that there are subtle differences between
cables/firmwares? What is the exact type of cable that you tested with?

Kind regards, Joris.