Re: [Xc3sprog-users] XCFP does not yet support bitfile subranges

[Joris v. R. <jor...@jo...>]

On 2012-02-07, Mirko Ciecinski wrote:
> I applied your 2nd patch and now it seems to work.:-)

Great, thanks for testing.
 
> But after rebooting ePC, FPGA does not load its program from
> EEPROM. :-( Programming FPGA directly with command line parameter "-p
> 1" is working fine, but of course after shutdown my system does not
> work again.

xc3sprog sets up the PROM in slave serial mode. This means that the
FPGA must boot in master serial mode to make it work. I.e. one data
wire from PROM to FPGA, FPGA generates configuration clock for PROM.

If your board is wired differently, for example with multiple data
wires between PROM and FPGA, the PROM would need to be set up
differently. xc3sprog currently can not do this (although it would not
be very hard to implement it). You can deduce the boot method of your
board by looking at the level of the mode pins M0,M1,M2 of the FPGA.

> Anyway, if you are sure, that XC3SPROG message "Success!" is correct,
> I think there is another problem (hardware). And you can commit your
> patches to xc3sprog-project.

xc3sprog performs (most of) the status checks that are prescribed by
the XCFP programming algorithm, and Success means that all of these
passed.

You could try reading back the contents of the PROM with
  xc3sprog -v -c ftdi dump.bit:r

The read-back BIT file should be equivalent to the original, although
the header may be different and 0xFF padding may be truncated from the
end. But you should be able to directly configure the FPGA with the
read-back BIT file, for example.

Joris.