[Xc3sprog-users] SPI programming - delayed reads

[Álvaro L. <alv...@al...>]

Hi all,

This is my first post to this list, and I'd like to thank all of you for the excellent work you are doing with this project. I've been using it (actually
variants of it) for a long time, and I feel it's time to go mainline and contribute my changes for the project benefit.

Right now I'm porting SST SPI flash programming algorithms to upstream. They are based on very old source code, and there were significant changes to BSCAN
based approach - right now there is no way to do a full transfer (write+read) on same transaction.

SST uses AAI programming (Auto Address Increment), and they support busy reply at end of each command. The latest BSCAN approach stores the last scanned-in
result in BRAM, and we have to do another request in order to fetch last buffer reply (at least, that's how I understood it from the HDL sources). In order to
speed up writes (each AAI command only programs 2 bytes at a time) having to check status register, or do another transaction, has a huge impact on write
performance.

My first suggestion (and I'll do implementation) is to have two modes when using BSCAN+SPI: one where SPI output is directly mapped to TDO output, and other
which uses the current BRAM buffer. This can easily be implemented by a bit-mangling on the 32-bit header. So, at every request, you can specify whether you
want the current value to be output, or the last scanned in value (as in current implementation)

Questions, thoughts ?

And again, thanks for your amazing work!

Álvaro