Re: [Xc3sprog-users] Xilinx Spartan-3A-DSP SPI programming issues

[Tomek C. <tom...@gm...>]

On Sun, Aug 28, 2011 at 11:23 AM, Uwe Bonnes
<bo...@el...> wrote:
> You can slow down FTx232 based cables. I don't know about the Xilinx download
> cables. Those doing the reverse enginnering didn't mention that:
> http://sourceforge.net/apps/mediawiki/urjtag/index.php?title=Cable_Xilinx_Platform_Cable_USB

Ah, I have also some FT2232 cables, I will try to use them and report
the results :-) Thank you :-)

> If you are under pressure, why not use impact?

Because I am using FreeBSD with Linux binaries of ISE and the support
for their cables on platforms other thant Windows is terrible, as you
know :-) This is why I use XC3SPROG to avoid using iMPACT - and here
once again great thank you for this marvelous tool! :-) You should
write on the project website that is totally overcomes iMPACT
limitations on open-source platforms, because it is not that obvious
for person that did not use it before :-) Ofcourse I can use iMPACT to
generate SVF and then replay it in UrJTAG, but using XC3SPROG gives me
rapid ability to upload bitfile into FPGA with no use of this terrible
iMPACT :-)

> If it doesn't work with impact neither, get your JTAG chain setup right. If
> it does wrok with impact, it will indicate an error in xc3sprog.

The problem I have is that bitfile does not upload into SPI correctly
because there are errors during the flash. I can upload bitfile
directly into FPGA with no problem :-) This might be caused by too
fast speed of Xilinx cable that cannot be changed, I will try to use
FT2232 cable instead and let you know the results :-)

Best regards,
Tomek Cedro

-- 
CeDeROM, SQ7MHZ, http://www.tomek.cedro.info