From: Joris v. R. <jo...@sr...> - 2010-07-09 17:03:30
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On Friday, July 09, 2010 11:15:13 Uwe Bonnes wrote: > What is the program time now? About 480 seconds to program 24 Mbit. In the Linux kernel that I used, the option for high resolution timing was turned off. Today I figured out that high resolution timing greatly improves the accuracy of usleep. I will enable this setting and test again next week. > Btw: Any chance to look at the TDO driving gate on the S3 kit? I did not precisely understand your remarks (I'm not an electronics engineer). But let's try. On the S3 starter kit schematics, the type of IC2A is not specified. On the actual board, I can see an IC2 which is a tiny surface mounted thingy, marked something like "WOC". The Pender GR-XC3S1500 also fails with the parallel cable. Its schematic shows that TDO is driven directly from the FPGA's TDO pin without any components in between. Just to be sure, let me say again that the issue is only with the check for "missing power" at initialization time (which then aborts the program). If that check is skipped, programming with the parallel cable works absolutely fine for me. Greetings, Joris. |