From: CeDeROM <tom...@gm...> - 2010-02-01 22:39:18
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Hello Uwe! On Mon, Feb 1, 2010 at 9:31 AM, Uwe Bonnes <bo...@el...> wrote: > I tested reading the ADSP board when adapting the SPI code. There is no BPI > code yet, but contributions are welcome. I did not test write the S33 on > the ADSP, but i think I tested on other boards. What did you do? What didn't > work as expected? I was trying to generate bitstream of my project with ISE (most recent one 11.4 i think), but no S33 is on the list - Xilinx sux ass in this matter - I have chosen M25P64 as a replacement from Numonyx, then generated SVF file and then played that SVF file with UrJTAG. Loading file into Flash takes a long time and fails. Uploading bitstream directly into FPGA works fine, and project works until power is on. I am wondering if the prom file is wrong, or programming the flash fails. I think that there is no communication with flash, as its content remains after playing SVF containing "erase-write-verify" cycle... so I am lookins some other tools to program that S33 memory, or BPI memory instead :-) I could use my JTAG adapter as ISP programmer directly on the Flash Chip, but using FPGA-JTAG seems more versatile, especialy if no SPI pinout is available on the PCB... Maybe the core uploaded into FPGA for programming the flash use some different programming algorithm, but as I have seen on the M25P64 document page thet are almost compatibile, except the mass/block erase available on S33. > The DLC9/10 needs firmware that is installed when the impact driver is > installed. Im using FT2232 and FT2232H based cables - none of them was detected on the binary for win32. Are they supported off the box or I must recompile? Has anyone managed to run xc3sprogs on FreeBSD? Best regards, Tomek -- CeDeROM, http://www.tomek.cedro.info |