[Wisp-cvs] wisp/users/dig ia32.tran,NONE,1.1 hello.tran,1.1,1.2 mswhello.tran,1.1,1.2 tran.py,1.11,1.12

[<di...@us...>]

Update of /cvsroot/wisp/wisp/users/dig
In directory sc8-pr-cvs1:/tmp/cvs-serv19977

Modified Files:
	hello.tran mswhello.tran tran.py 
Added Files:
	ia32.tran 
Log Message:
extracted ia32.tran from hello.tran

--- NEW FILE: ia32.tran ---
\\\\ ia32.tran - 32-bit Intel architecture
\
\ Copyleft © 2003 by Andres Soolo (di...@us...)
\ This file is licensed under the GNU GPL v2.  If you
\ don't know what that means, please do read the GPL.
\
\\\\ @(#) $Id: ia32.tran,v 1.1 2003/04/16 07:58:58 digg Exp $

\ registers
:regs reg32 %eax %ecx %edx %ebx %esp %ebp %esi %edi ;
:regs reg16 %ax %cx %dx %bx %sp %bp %si %di ;
:regs reg8  %al %cl %dl %bl %ah %ch %dh %bh ;

lit       :macro $int #xCD b, b, ;
reg32 lit :macro $mov swap minor #o270 + b, t, ;


Index: hello.tran
===================================================================
RCS file: /cvsroot/wisp/wisp/users/dig/hello.tran,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- hello.tran	12 Apr 2003 11:17:57 -0000	1.1
+++ hello.tran	16 Apr 2003 07:58:57 -0000	1.2
@@ -8,13 +8,7 @@
 
 \ This file is intended to be processed using tran.py
 
-\ ia32 registers
-:regs reg32 %eax %ecx %edx %ebx %esp %ebp %esi %edi ;
-:regs reg16 %ax %cx %dx %bx %sp %bp %si %di ;
-:regs reg8  %al %cl %dl %bl %ah %ch %dh %bh ;
-
-lit       :macro $int #xCD b, b, ;
-reg32 lit :macro $mov swap minor #o270 + b, t, ;
+include ia32
 
 \ main entry point
 

Index: mswhello.tran
===================================================================
RCS file: /cvsroot/wisp/wisp/users/dig/mswhello.tran,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- mswhello.tran	15 Apr 2003 21:12:15 -0000	1.1
+++ mswhello.tran	16 Apr 2003 07:58:58 -0000	1.2
@@ -8,14 +8,10 @@
 
 \ NOTE that mswhello.tran is not currently translatable
 
-\ ia32 registers
-:regs reg32 %eax %ecx %edx %ebx %esp %ebp %esi %edi ;
-:regs reg16 %ax %cx %dx %bx %sp %bp %si %di ;
-:regs reg8  %al %cl %dl %bl %ah %ch %dh %bh ;
+include ia32
 
-lit       :macro $int #xCD b, b, ;
 lit       :macro $push #x68 b, t, ;
-reg32 lit :macro $mov swap minor #o270 + b, t, ;
+lit       :macro $call #xe8 b, $- 4 - t, ;
 
 \ main entry point
 

Index: tran.py
===================================================================
RCS file: /cvsroot/wisp/wisp/users/dig/tran.py,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- tran.py	15 Apr 2003 22:01:19 -0000	1.11
+++ tran.py	16 Apr 2003 07:58:58 -0000	1.12
@@ -214,6 +214,9 @@
             Macrostack.append([0, m[1]])
         elif mtype == 'simple':
             Regstack.append(m[1])
+        elif mtype == 'include':
+            fn = get_token() + '.tran'
+            lex.push_source(open(fn), fn)
         else: raise 'Unknown meaning type in', `Meaning[tok]`
 def state_record (tok):
     global State, current_recordee
@@ -259,6 +262,7 @@
     'b, lit':       ('builtin', b_comma,     1),
     'drop any':     ('builtin', drop,        1),
     'dup any':      ('builtin', dup,         1),
+    'include':      ('include',),
     'int':          ('simple',  ClassMarker('int')),
     'label':        ('builtin', label,       0 | MA_PREFIX),
     'lit':          ('simple',  ClassMarker('lit')),