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[Win32forth-cvs] win32forth-stc/src dis486.f, 1.12, 1.13 optliterals.f, 1.11, 1.12
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From: Alex M. <ale...@us...> - 2007-03-02 15:17:00
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Update of /cvsroot/win32forth/win32forth-stc/src In directory sc8-pr-cvs9.sourceforge.net:/tmp/cvs-serv25040 Modified Files: dis486.f optliterals.f Log Message: arm: simplify disassembler for intended SEE improvements Index: dis486.f =================================================================== RCS file: /cvsroot/win32forth/win32forth-stc/src/dis486.f,v retrieving revision 1.12 retrieving revision 1.13 diff -C2 -d -r1.12 -r1.13 *** dis486.f 1 Feb 2007 23:01:39 -0000 1.12 --- dis486.f 2 Mar 2007 15:16:54 -0000 1.13 *************** *** 3,16 **** \ 80386 Disassembler ! \ rbs - changed vars and functions to hint at parameters used and what they do. ! \ Also removed "ptr" from "byte ptr" and "word ptr" as it is unnecessary and ! \ inconsistent with "dword" which did not append "ptr" January 5th, 2003 ! \ Andrew McKewan, April 1994 ! \ Tom Zimmer, 05/18/94 port to Win32f ! \ Modified to word in decimal 08/03/94 10:04 tjz ! \ 06-??-95 SMuB NEXT sequence defined in FKERNEL ! \ 06-21-95 SMuB removed redundant COUNT calls from txb, lxs. ! \ 04-??-97 Extended by C.L. to include P6 and MMX instructions cr .( Loading 80486 Disassembler...) --- 3,31 ---- \ 80386 Disassembler ! \ ------------------------------------------------------------------------ ! \ Copyright [c] 2005 by Alex McDonald (alex at rivadpm dot com) ! \ Dirk Busch (dirk.yahoo @ schneider-busch.de) ! \ George Hubert (georgeahubert at yahoo.co.uk) ! ! \ Based on work by Tom Zimmer and others ! ! \ ! \ This program is free software; you can redistribute it and/or modify it ! \ under the terms of the GNU General Public License as published by the ! \ Free Software Foundation; either version 2 of the License, or <at your ! \ option> any later version. ! \ ! \ This program is distributed in the hope that it will be useful, but ! \ WITHOUT ANY WARRANTY; without even the implied warranty of ! \ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ! \ General Public License for more details. ! \ ! \ You should have received a copy of the GNU General Public License along ! \ with this program; if not, write to the Free Software Foundation, Inc., ! \ 675 Mass Ave, Cambridge, MA 02139, USA. ! \ ! ! \ ------------------------------------------------------------------------ cr .( Loading 80486 Disassembler...) *************** *** 102,106 **** : cmnt-col 60 col ; \ set to comment field ! : .ss ( n adr len w ) oper-col >r drop swap r@ * + r> type opnd-col ; : .# ( -- ) ." # " ; : ., ( -- ) ." , " ; --- 117,121 ---- : cmnt-col 60 col ; \ set to comment field ! : .ss ( n adr w ) oper-col >r swap r@ * + r> type opnd-col ; : .# ( -- ) ." # " ; : ., ( -- ) ." , " ; *************** *** 109,124 **** : ??? ( n1 -- ) .sop" ???" drop ; ! : .word ." word " ; ! : .dword ." dword " ; ! : .float ." float " ; ! : .double ." double " ; ! : .extended ." extended " ; ! : .qword ." qword " ; ! : .tbyte ." tbyte " ; ! : .far ." far " ; ! : .al, ." al, " ; ! : .ax, ." ax, " ; ! : .eax, ." eax, " ; : .sop-fwait .sop" fwait" ; --- 124,140 ---- : ??? ( n1 -- ) .sop" ???" drop ; ! : .word ." word " ; ! : .dword ." dword " ; ! : .float ." float " ; ! : .double ." double " ; ! : .extended ." extended " ; ! : .qword ." qword " ; ! : .tbyte ." tbyte " ; ! : .far ." far " ; ! : .al, ." al, " ; ! : .ax, ." ax, " ; ! : .eax, ." eax, " ; ! : .dx ." dx" ; : .sop-fwait .sop" fwait" ; *************** *** 136,180 **** \ r/op includes general, special, segment, MMX registers or extended opcode ! : bits0-1 ( n -- n' ) 3 and ; \ isolate bits 0 thru 1 ! : bits0-2 ( n -- n' ) 7 and ; \ isolate bits 0 thru 2 ! : bits0-3 ( n -- n' ) 15 and ; \ isolate bits 0 thru 3 : bits3-5 ( n -- n' ) 3 rshift bits0-2 ; \ isolate bits 3 thru 5 : bits3-4 ( n -- n' ) 3 rshift bits0-1 ; \ isolate bits 3 thru 4 ! : .[ ( -- ) ." [" ; ! : .] ( -- ) ." ]" ; ! : .*2] ( -- ) ." *2]" ; ! : .*4] ( -- ) ." *4]" ; ! : .*8] ( -- ) ." *8]" ; ! ! : .cnd-code(op) ( code -- ) bits0-3 S" o nob aee nebea s nsp npl geleg " 2 .ss ; \ was tttn ! : .sreg(XX-NNN-XXX) ( sreg -- ) bits3-5 S" escsssdsfsgsXXXX" 2 .ss ; ! : .creg(XX-NNN-XXX) ( eee -- ) bits3-5 S" cr0???cr2cr3cr4?????????" 3 .ss ; ! : .dreg(XX-NNN-XXX) ( eee -- ) bits3-5 S" dr0dr1dr2dr3??????dr6dr7" 3 .ss ; ! : .treg(XX-NNN-XXX) ( eee -- ) bits3-5 S" ?????????tr3tr4tr5tr6tr7" 3 .ss ; \ obsolete ! ! : .regm(XX-XXX-NNN) ( n -- ) bits0-2 S" mm0mm1mm2mm3mm4mm5mm6mm7" 3 .ss ; ! : .reg8(XX-XXX-NNN) ( n -- ) bits0-2 S" alcldlblahchdhbh" 2 .ss ; ! : .reg16(XX-XXX-NNN) ( n -- ) bits0-2 S" axcxdxbxspbpsidi" 2 .ss ; ! : .reg32(XX-XXX-NNN) ( n -- ) bits0-2 S" eaxecxedxebxespebpesiedi" 3 .ss ; ! ! : .[reg32](XX-XXX-NNN) ( n -- ) bits0-2 .[ .reg32(XX-XXX-NNN) .] ; ! : .[reg*2](XX-XXX-NNN) ( n -- ) bits0-2 .[ .reg32(XX-XXX-NNN) .*2] ; ! : .[reg*4](XX-XXX-NNN) ( n -- ) bits0-2 .[ .reg32(XX-XXX-NNN) .*4] ; ! : .[reg*8](XX-XXX-NNN) ( n -- ) bits0-2 .[ .reg32(XX-XXX-NNN) .*8] ; ! : .[base16](XX-XXX-1NN) ( r/m -- ) bits0-1 S" [si][di][bp][bx]" 4 .ss ; \ r/m = 4, 5, 6, 7 ! : .[ind16](XX-XXX-0NN) ( r/m -- ) bits0-1 S" [bx+si][bx+di][bp+si][bp+di]" 7 .ss ; \ r/m = 0, 1, 2, 3 : .reg16/32(XX-XXX-NNN) ( n -- ) dis.16-bit-data if .reg16(XX-XXX-NNN) else .reg32(XX-XXX-NNN) then ; - : .[reg16](XX-XXX-NNN) ( r/m -- ) bits0-2 dup 4 < if .[ind16](XX-XXX-0NN) else .[base16](XX-XXX-1NN) then ; ! : .reg(XX-XXX-NNN) ( a n -- a ) ! dis.mmx-reg? ! if .regm(XX-XXX-NNN) ! else dis.size ! if .reg16/32(XX-XXX-NNN) ! else .reg8(XX-XXX-NNN) ! then then ; --- 152,187 ---- \ r/op includes general, special, segment, MMX registers or extended opcode ! : bits0-1 ( n -- n' ) %0011 and ; \ isolate bits 0 thru 1 ! : bits0-2 ( n -- n' ) %0111 and ; \ isolate bits 0 thru 2 ! : bits0-3 ( n -- n' ) %1111 and ; \ isolate bits 0 thru 3 : bits3-5 ( n -- n' ) 3 rshift bits0-2 ; \ isolate bits 3 thru 5 : bits3-4 ( n -- n' ) 3 rshift bits0-1 ; \ isolate bits 3 thru 4 + : bit3 ( n -- f ) %1000 and ; + : bit2 ( n -- f ) %0100 and ; + : bit1 ( n -- f ) %0010 and ; + : bit0 ( n -- f ) %0001 and ; ! : .cnd-code ( code -- ) bits0-3 z" o nob aee nebea s nsp npl geleg " 2 .ss ; \ was tttn ! : .sreg(XX-NNN-XXX) ( sreg -- ) bits3-5 z" escsssdsfsgs????" 2 .ss ; ! : .creg(XX-NNN-XXX) ( eee -- ) bits3-5 z" cr0???cr2cr3cr4?????????" 3 .ss ; ! : .dreg(XX-NNN-XXX) ( eee -- ) bits3-5 z" dr0dr1dr2dr3??????dr6dr7" 3 .ss ; ! : .treg(XX-NNN-XXX) ( eee -- ) bits3-5 z" ?????????tr3tr4tr5tr6tr7" 3 .ss ; \ obsolete ! : .regm(XX-XXX-NNN) ( n -- ) bits0-2 z" mm0mm1mm2mm3mm4mm5mm6mm7" 3 .ss ; ! : .reg8(XX-XXX-NNN) ( n -- ) bits0-2 z" alcldlblahchdhbh" 2 .ss ; ! : .reg16(XX-XXX-NNN) ( n -- ) bits0-2 z" axcxdxbxspbpsidi" 2 .ss ; ! : .reg32(XX-XXX-NNN) ( n -- ) bits0-2 z" eaxecxedxebxespebpesiedi" 3 .ss ; : .reg16/32(XX-XXX-NNN) ( n -- ) dis.16-bit-data if .reg16(XX-XXX-NNN) else .reg32(XX-XXX-NNN) then ; ! : .[ind16](XX-XXX-0NN) ( r/m -- ) bits0-1 z" [bx+si][bx+di][bp+si][bp+di]" 7 .ss ; \ r/m = 0, 1, 2, 3 ! : .[base16](XX-XXX-1NN) ( r/m -- ) bits0-1 z" [si][di][bp][bx]" 4 .ss ; \ r/m = 4, 5, 6, 7 ! : .[reg16](XX-XXX-NNN) ( r/m -- ) bit2 if .[ind16](XX-XXX-0NN) else .[base16](XX-XXX-1NN) then ; ! ! : .reg(XX-XXX-NNN) ( n -- ) ! dis.mmx-reg? if .regm(XX-XXX-NNN) ! else dis.size if .reg16/32(XX-XXX-NNN) ! else .reg8(XX-XXX-NNN) ! then then ; *************** *** 206,209 **** --- 213,222 ---- THEN show-name ; + : .[reg32 ( n -- ) ." [" bits0-2 .reg32(XX-XXX-NNN) ; \ prints [reg + : .[reg32](XX-XXX-NNN) ( n -- ) .[reg32 ." ]" ; + : .[reg*2](XX-XXX-NNN) ( n -- ) .[reg32 ." *2]" ; + : .[reg*4](XX-XXX-NNN) ( n -- ) .[reg32 ." *4]" ; + : .[reg*8](XX-XXX-NNN) ( n -- ) .[reg32 ." *8]" ; + : .[index]=SS-III-BBB ( sib -- ) parse/sib over 4 = \ ( b i s ) i=4? *************** *** 270,287 **** : r,r/m() ( adr -- adr' ) ! count dup 3 rshift ( op/reg->reg/m ) .reg(XX-XXX-NNN) ., mod-r/m(ModR/M) ; : r/m,r() ( adr -- adr' ) ! count dup >r mod-r/m(ModR/M) ., r> 3 rshift .reg(XX-XXX-NNN) ; : r/m() ( adr op -- adr' ) ! 2 and if r,r/m() else r/m,r() then ; \ -------------------- Simple Opcodes -------------------- : opstr ( -- "name" ) ! create ! /parse-word count ", ; : inh ( -<name>- ) --- 283,299 ---- : r,r/m() ( adr -- adr' ) ! count dup bits3-5 ( op/reg->reg/m ) .reg(XX-XXX-NNN) ., mod-r/m(ModR/M) ; : r/m,r() ( adr -- adr' ) ! count dup >r mod-r/m(ModR/M) ., r> bits3-5 .reg(XX-XXX-NNN) ; : r/m() ( adr op -- adr' ) ! bit1 if r,r/m() else r/m,r() then ; \ -------------------- Simple Opcodes -------------------- : opstr ( -- "name" ) ! create /parse-word count ", ; : inh ( -<name>- ) *************** *** 290,293 **** --- 302,307 ---- inh clc "clc" inh stc "stc" + inh cli "cli" + inh sti "sti" inh cld "cld" inh std "std" *************** *** 305,310 **** inh cmc "cmc" inh xlt "xlat" - inh cli "cli" - inh sti "sti" inh clt "clts" inh inv "invd" --- 319,322 ---- *************** *** 327,331 **** : str ( addr code -- addr' ) ! opstr does> count oper-col type 1 and if ." d" else ." b" then cmnt-col ; str mvs "movs" --- 339,343 ---- : str ( addr code -- addr' ) ! opstr does> oper-col count type bit0 if ." d" else ." b" then cmnt-col ; str mvs "movs" *************** *** 338,342 **** : pre ( addr code -- addr' ) ! opstr does> count (.sop") drop true to dis.prefix-op ; pre cs: "cs:" --- 350,354 ---- : pre ( addr code -- addr' ) ! inh true to dis.prefix-op ; pre cs: "cs:" *************** *** 360,375 **** : isd ( adr code -- adr' ) drop dis.16-bit-data if .sop" insw" else .sop" insd" then ; : osd ( adr code -- adr' ) drop dis.16-bit-data if .sop" outsw" else .sop" outsd" then ; ! : inp ( adr code -- adr' ) .sop" in" opnd-col 1 and IF dis.16-bit-data IF .ax, ELSE .eax, THEN ELSE .al, THEN count $. ; ! : ind ( adr code -- adr' ) .sop" in" opnd-col 1 and IF dis.16-bit-data IF ." ax, dx" ELSE ." eax, dx" THEN ELSE ." al, dx" THEN ; ! : otp ( adr code -- adr' ) .sop" out" opnd-col 1 and IF count $. dis.16-bit-data IF ." , ax" ELSE ." , eax" THEN ELSE count $. ." , al" THEN ; ! : otd ( adr code -- adr' ) .sop" out" opnd-col 1 and IF dis.16-bit-data IF ." dx, ax" ELSE ." dx, eax" THEN ELSE ." dx, al" THEN ; \ -------------------- ALU Opcodes -------------------- ! : .alu ( n -- ) bits3-5 S" addor adcsbbandsubxorcmp" 3 .ss ; : alu ( adr op -- adr' ) dup .alu r/m() ; ! ! : ali ( adr op -- adr' ) >r count dup .alu --- 372,391 ---- : isd ( adr code -- adr' ) drop dis.16-bit-data if .sop" insw" else .sop" insd" then ; : osd ( adr code -- adr' ) drop dis.16-bit-data if .sop" outsw" else .sop" outsd" then ; ! ! : inp/ind ( adr code -- adr' ) .sop" in" opnd-col bit0 if dis.16-bit-data if .ax, else .eax, then else .al, then ; ! : inp ( adr code -- adr' ) inp/ind count $. ; ! : ind ( adr code -- adr' ) inp/ind .dx ; ! ! : .out ( adr code -- adr' ) .sop" out" opnd-col ; ! : otp/otd ( adr code -- adr' ) bit0 if dis.16-bit-data if ." , ax" else ." , eax" then else ." , al" then ; ! : otp ( adr code -- adr' ) .out swap count $. swap otp/otd ; ! : otd ( adr code -- adr' ) .out .dx otp/otd ; \ -------------------- ALU Opcodes -------------------- ! : .alu ( n -- ) bits3-5 z" addor adcsbbandsubxorcmp" 3 .ss ; : alu ( adr op -- adr' ) dup .alu r/m() ; ! : ali ( adr op -- adr' ) >r count dup .alu *************** *** 383,401 **** then ; ! : ala ( adr op -- adr' ) ! dup .alu 1 and if 0 .reg(XX-XXX-NNN) .imm16/32[pc++] else 0 .reg8(XX-XXX-NNN) .imm8[pc++] then ; \ -------------------- Test/Xchg -------------------- : txb ( addr op -- addr' ) ! dup bits0-1 S" testtestxchgxchg" 4 .ss ! 1 and ! IF 1 to dis.size r,r/m() \ SMuB removed COUNT ! ELSE 0 to dis.size r,r/m() \ SMuB removed COUNT ! THEN ; : tst ( addr op -- addr' ) ! .sop" test" 1 and IF dis.16-bit-data IF .ax, --- 399,414 ---- then ; ! : ala ( adr op -- adr' ) ! dup .alu bit0 if 0 .reg(XX-XXX-NNN) .imm16/32[pc++] else 0 .reg8(XX-XXX-NNN) .imm8[pc++] then ; \ -------------------- Test/Xchg -------------------- : txb ( addr op -- addr' ) ! dup bit1 z" testxchg" 4 .ss ! bit0 to dis.size r,r/m() ; : tst ( addr op -- addr' ) ! .sop" test" bit0 IF dis.16-bit-data IF .ax, *************** *** 410,414 **** : ppp ( addr op -- addr' ) ! opstr does> oper-col count type drop dis.16-bit-data 0= IF ." d" THEN opnd-col ; --- 423,427 ---- : ppp ( addr op -- addr' ) ! opstr does> count oper-col type drop dis.16-bit-data 0= IF ." d" THEN opnd-col ; *************** *** 429,433 **** : pps ( addr op -- addr' ) .sop" pop" .sreg(XX-NNN-XXX) ; : 8F. ( addr op -- addr' ) drop count .sop" pop" r/m16/32(ModR/M) ; ! : psi ( addr op -- addr' ) .sop" push" 2 and IF .imm8[pc++] ELSE .imm16/32[pc++] THEN ; \ -------------------- Move -------------------- --- 442,446 ---- : pps ( addr op -- addr' ) .sop" pop" .sreg(XX-NNN-XXX) ; : 8F. ( addr op -- addr' ) drop count .sop" pop" r/m16/32(ModR/M) ; ! : psi ( addr op -- addr' ) .sop" push" bit1 IF .imm8[pc++] ELSE .imm16/32[pc++] THEN ; \ -------------------- Move -------------------- *************** *** 435,439 **** : mov ( addr op -- addr' ) .sop-mov r/m() ; : mri ( addr op -- addr' ) ! .sop-mov dup 8 and IF .reg16/32(XX-XXX-NNN) .imm16/32[pc++] ELSE .reg8(XX-XXX-NNN) .imm8[pc++] --- 448,452 ---- : mov ( addr op -- addr' ) .sop-mov r/m() ; : mri ( addr op -- addr' ) ! .sop-mov dup bit3 IF .reg16/32(XX-XXX-NNN) .imm16/32[pc++] ELSE .reg8(XX-XXX-NNN) .imm8[pc++] *************** *** 474,478 **** : mv1 ( addr op -- addr' ) ! .sop-mov 1 and IF dis.16-bit-data IF .ax, --- 487,491 ---- : mv1 ( addr op -- addr' ) ! .sop-mov bit0 IF dis.16-bit-data IF .ax, *************** *** 484,488 **** : mv2 ( addr op -- addr' ) ! .sop-mov .disp16/32[pc++] ., 1 and IF dis.16-bit-data IF ." ax" --- 497,501 ---- : mv2 ( addr op -- addr' ) ! .sop-mov .disp16/32[pc++] ., bit0 IF dis.16-bit-data IF ." ax" *************** *** 493,497 **** : lea ( addr op -- addr' ) .sop" lea" drop 1 to dis.size r,r/m() ; ! : lxs ( addr op -- addr' ) 1 and IF .sop" lds" ELSE .sop" les" THEN r,r/m() ; : bnd ( addr op -- addr' ) .sop" bound" drop 1 to dis.size r,r/m() ; : arp ( addr op -- addr' ) .sop" arpl" drop 1 to dis.size true to dis.16-bit-data r,r/m() ; --- 506,510 ---- : lea ( addr op -- addr' ) .sop" lea" drop 1 to dis.size r,r/m() ; ! : lxs ( addr op -- addr' ) bit0 IF .sop" lds" ELSE .sop" les" THEN r,r/m() ; : bnd ( addr op -- addr' ) .sop" bound" drop 1 to dis.size r,r/m() ; : arp ( addr op -- addr' ) .sop" arpl" drop 1 to dis.size true to dis.16-bit-data r,r/m() ; *************** *** 506,516 **** : jsr ( addr op -- addr' ) .sop" call" drop .rel16/32 ; ! : jmp ( addr op -- addr' ) .sop" jmp" 2 and if .rel8 else .rel16/32 then ; ! : .jxx ( addr op -- addr' ) oper-col ." j" .cnd-code(op) opnd-col ; : bra ( addr op -- addr' ) .jxx .rel8 ; ! : lup ( addr op -- addr' ) bits0-1 S" loopnzloopz loop jecxz " 6 .ss .rel8 ; : lbr ( addr op -- addr' ) .jxx .rel16/32 ; ! : rtn ( addr op -- addr' ) .sop" ret" ." near " 1 and 0= IF wCount $. THEN ; ! : rtf ( addr op -- addr' ) .sop" ret" .far 1 and 0= IF wCount $. THEN ; : ent ( addr op -- addr' ) .sop" enter" drop wCount $. ., count $. ; --- 519,529 ---- : jsr ( addr op -- addr' ) .sop" call" drop .rel16/32 ; ! : jmp ( addr op -- addr' ) .sop" jmp" bit1 if .rel8 else .rel16/32 then ; ! : .jxx ( addr op -- addr' ) oper-col ." j" .cnd-code opnd-col ; : bra ( addr op -- addr' ) .jxx .rel8 ; ! : lup ( addr op -- addr' ) bits0-1 z" loopnzloopz loop jecxz " 6 .ss .rel8 ; : lbr ( addr op -- addr' ) .jxx .rel16/32 ; ! : rtn ( addr op -- addr' ) .sop" ret" ." near " bit0 0= IF wCount $. THEN ; ! : rtf ( addr op -- addr' ) .sop" ret" .far bit0 0= IF wCount $. THEN ; : ent ( addr op -- addr' ) .sop" enter" drop wCount $. ., count $. ; *************** *** 544,552 **** \ -------------------- Shifts & Rotates -------------------- ! : .shift ( n -- ) bits0-2 S" rolrorrclrcrshlshrxxxsar" 3 .ss ; : shf ( addr op -- addr' ) >r count ! dup 3 rshift .shift mod-r/m(ModR/M) ., r> 0xD2 and --- 557,565 ---- \ -------------------- Shifts & Rotates -------------------- ! : .shift ( n -- ) bits3-5 z" rolrorrclrcrshlshrxxxsar" 3 .ss ; : shf ( addr op -- addr' ) >r count ! dup .shift mod-r/m(ModR/M) ., r> 0xD2 and *************** *** 605,613 **** THEN ; ! : falu1 ( xopcode -- ) bits3-5 S" fadd fmul fcom fcompfsub fsubrfdiv fdivr" 5 .ss ; ! : falu3 ( op -- ) bits3-5 S" fiadd fimul ficom ficompfisub fisubrfidiv fidivr" 6 .ss ; ! : falu5 ( xopcode -- ) bits3-5 s" fadd fmul ???? ???? fsubrfsub fdivrfdiv " 5 .ss ; ! : falu6 ( op -- ) bits3-5 s" ffree ??? fst fstp fucom fucomp??? ??? " 6 .ss ; ! : falu7 ( op -- ) bits3-5 S" faddp fmulp ??? ??? fsubrpfsubp fdivrpfdivp " 6 .ss ; : sti. ( op -- ) bits0-2 ." st(" 1 .r ." )" ; --- 618,626 ---- THEN ; ! : falu1 ( xopcode -- ) bits3-5 z" fadd fmul fcom fcompfsub fsubrfdiv fdivr" 5 .ss ; ! : falu3 ( op -- ) bits3-5 z" fiadd fimul ficom ficompfisub fisubrfidiv fidivr" 6 .ss ; ! : falu5 ( xopcode -- ) bits3-5 z" fadd fmul ???? ???? fsubrfsub fdivrfdiv " 5 .ss ; ! : falu6 ( op -- ) bits3-5 z" ffree ??? fst fstp fucom fucomp??? ??? " 6 .ss ; ! : falu7 ( op -- ) bits3-5 z" faddp fmulp ??? ??? fsubrpfsubp fdivrpfdivp " 6 .ss ; : sti. ( op -- ) bits0-2 ." st(" 1 .r ." )" ; *************** *** 633,639 **** 0x0f and dup 8 < IF ! S" f2xm1 fyl2x fptan fpatan fxtractfprem1 fdecstpfincstp" ELSE 8 - ! S" fprem fyl2xp1fsqrt fsincosfrndintfscale fsin fcos " THEN 7 .ss ; --- 646,652 ---- 0x0f and dup 8 < IF ! z" f2xm1 fyl2x fptan fpatan fxtractfprem1 fdecstpfincstp" ELSE 8 - ! z" fprem fyl2xp1fsqrt fsincosfrndintfscale fsin fcos " THEN 7 .ss ; *************** *** 642,648 **** 0x0f and dup 8 < IF ! S" fchs fabs ??? ??? ftst fxam ??? ??? " ELSE 8 - ! S" fld1 fldl2t fldl2e fldpi fldlg2 fldln2 fldz ??? " THEN 7 .ss ; --- 655,661 ---- 0x0f and dup 8 < IF ! z" fchs fabs ??? ??? ftst fxam ??? ??? " ELSE 8 - ! z" fld1 fldl2t fldl2e fldpi fldlg2 fldln2 fldz ??? " THEN 7 .ss ; *************** *** 689,693 **** : fcmova ( op -- ) bits3-5 ! S" fcmovb fcmove fcmovbefcmovu ??? ??? ??? ??? " 7 .ss ; --- 702,706 ---- : fcmova ( op -- ) bits3-5 ! z" fcmovb fcmove fcmovbefcmovu ??? ??? ??? ??? " 7 .ss ; *************** *** 712,716 **** : fcmovb ( op -- ) bits3-5 ! S" fcmovnb fcmovne fcmovnbefcmovnu ??? fucomi fcomi ??? " 8 .ss ; : fdb ( addr op -- addr' ) --- 725,729 ---- : fcmovb ( op -- ) bits3-5 ! z" fcmovnb fcmovne fcmovnbefcmovnu ??? fucomi fcomi ??? " 8 .ss ; : fdb ( addr op -- addr' ) *************** *** 772,785 **** : gp6 ( addr op -- addr' ) ! drop count dup bits3-5 S" sldtstr lldtltr verrverw??? ???" 4 .ss r/m16(ModR/M) ; : gp7 ( addr op -- addr' ) ! drop count dup bits3-5 dup S" sgdt sidt lgdt lidt smsw ??? lmsw invlpg" 6 .ss ! 4 and 4 = if r/m16(ModR/M) else r/m16/32(ModR/M) then ; ! : .btx(XXXN-NXXX) ( n -- ) bits3-4 S" bt btsbtrbtc" 3 .ss ; : gp8 ( addr op -- addr' ) --- 785,798 ---- : gp6 ( addr op -- addr' ) ! drop count dup bits3-5 z" sldtstr lldtltr verrverw??? ???" 4 .ss r/m16(ModR/M) ; : gp7 ( addr op -- addr' ) ! drop count dup bits3-5 dup z" sgdt sidt lgdt lidt smsw ??? lmsw invlpg" 6 .ss ! bit2 if r/m16(ModR/M) else r/m16/32(ModR/M) then ; ! : .btx(XXXN-NXXX) ( n -- ) bits3-4 z" bt btsbtrbtc" 3 .ss ; : gp8 ( addr op -- addr' ) *************** *** 811,816 **** : btx ( addr op -- addr' ) .btx(XXXN-NXXX) r/m,r() ; ! : cxc ( addr op -- addr' ) .sop" cmpxchg" 1 and to dis.size r/m,r() ; ! : xad ( addr op -- addr' ) .sop" xadd" 1 and to dis.size r/m,r() ; : cx8 ( addr op -- addr' ) .sop" cmpxchg8b" drop count r/m16/32(ModR/M) ; : bsp ( addr op -- addr' ) .sop" bswap" .reg32(XX-XXX-NNN) ; --- 824,829 ---- : btx ( addr op -- addr' ) .btx(XXXN-NXXX) r/m,r() ; ! : cxc ( addr op -- addr' ) .sop" cmpxchg" bit0 to dis.size r/m,r() ; ! : xad ( addr op -- addr' ) .sop" xadd" bit0 to dis.size r/m,r() ; : cx8 ( addr op -- addr' ) .sop" cmpxchg8b" drop count r/m16/32(ModR/M) ; : bsp ( addr op -- addr' ) .sop" bswap" .reg32(XX-XXX-NNN) ; *************** *** 819,827 **** : mvx { addr op \ op2 -- addr' } addr op ! dup 8 and if .sop" movsx" else .sop" movzx" then ! 1 and >r count dup to op2 parse/sib r> \ size bit if swap .reg32(XX-XXX-NNN) ., \ word to dword case --- 832,840 ---- : mvx { addr op \ op2 -- addr' } addr op ! dup bit3 if .sop" movsx" else .sop" movzx" then ! bit0 >r count dup to op2 parse/sib r> \ size bit if swap .reg32(XX-XXX-NNN) ., \ word to dword case *************** *** 844,851 **** >r count dup bits3-5 dup >r ! S" testXXXXnot neg mul imuldiv idiv" 4 .ss mod-r/m(ModR/M) ! r> 0= if ! r@ 1 and if .imm16/32[pc++] else .imm8[pc++] then --- 857,864 ---- >r count dup bits3-5 dup >r ! z" test??? not neg mul imuldiv idiv" 4 .ss mod-r/m(ModR/M) ! r> 0= if ., ! r@ bit0 if .imm16/32[pc++] else .imm8[pc++] then *************** *** 879,896 **** : set ( adr op -- ) ! oper-col ." set" .cnd-code(op) opnd-col count r/m8(ModR/M) ; : cmv ( adr op -- ) ! oper-col ." cmov" .cnd-code(op) opnd-col r,r/m() ; \ --------------------- MMX Operations ----------------- ! : mmx-size ( op -- ) bits0-1 S" bwdq" 1 .ss ; ! : upl ( adr op -- adr' ) bits0-1 S" punpcklbwpunpcklwdpunpckldq" 9 .ss r,r/m() ; ! : uph ( adr op -- adr' ) bits0-1 S" punpckhbwpunpckhwdpunpckhdq" 9 .ss r,r/m() ; : .psx(XXNN-XXXX) ( op -- ) --- 892,909 ---- : set ( adr op -- ) ! oper-col ." set" .cnd-code opnd-col count r/m8(ModR/M) ; : cmv ( adr op -- ) ! oper-col ." cmov" .cnd-code opnd-col r,r/m() ; \ --------------------- MMX Operations ----------------- ! : mmx-size ( op -- ) bits0-1 z" bwdq" 1 .ss ; ! : upl ( adr op -- adr' ) bits0-1 z" punpcklbwpunpcklwdpunpckldq" 9 .ss r,r/m() ; ! : uph ( adr op -- adr' ) bits0-1 z" punpckhbwpunpckhwdpunpckhdq" 9 .ss r,r/m() ; : .psx(XXNN-XXXX) ( op -- ) *************** *** 1019,1023 **** false to dis.prefix-op \ SMuB count ! dup 1 and to dis.size dup cells op1-table + @ execute dis.prefix-op 0= --- 1032,1036 ---- false to dis.prefix-op \ SMuB count ! dup bit0 to dis.size dup cells op1-table + @ execute dis.prefix-op 0= *************** *** 1045,1052 **** ! : dis-db cr ." db " count $. ; ! : dis-dw cr ." dw " wCount $. ; ! : dis-dd cr ." dd " LCount $. ; ! : dis-ds cr ." string " 0x22 emit count 2dup type + 0x22 emit ; : dis ( adr -- ) --- 1058,1065 ---- ! : .db cr ." db " count $. ; ! : .dw cr ." dw " wCount $. ; ! : .dd cr ." dd " LCount $. ; ! : .ds cr ." string " 0x22 emit count 2dup type + 0x22 emit ; : dis ( adr -- ) *************** *** 1057,1064 **** while case ! 'B' of drop dis-db endof ! 'W' of drop dis-dw endof ! 'D' of drop dis-dd endof ! 'S' of drop dis-ds endof rot drop endcase --- 1070,1077 ---- while case ! 'B' of drop .db endof ! 'W' of drop .dw endof ! 'D' of drop .dd endof ! 'S' of drop .ds endof rot drop endcase *************** *** 1108,1112 **** ['] compile, of endof ['] execute of ." , immediate" endof ! dup ." , " show-name ." is non-std compilation part" endcase drop drop --- 1121,1125 ---- ['] compile, of endof ['] execute of ." , immediate" endof ! dup ., show-name ." is non-std compilation part" endcase drop drop Index: optliterals.f =================================================================== RCS file: /cvsroot/win32forth/win32forth-stc/src/optliterals.f,v retrieving revision 1.11 retrieving revision 1.12 diff -C2 -d -r1.11 -r1.12 *** optliterals.f 11 Dec 2006 10:42:36 -0000 1.11 --- optliterals.f 2 Mar 2007 15:16:54 -0000 1.12 *************** *** 40,44 **** also optimise definitions ! (( no stack effects; needs work 1 constant nse \ no side effects --- 40,44 ---- also optimise definitions ! (( no side effects; needs work 1 constant nse \ no side effects |
