Vietnam ASIC Design udemo

Status: Planning

Brought to you by: hoalu

Commit [r1] Maximize Restore History

Add downloads/dut

Authored by: hoalu 2013-12-10

Browse code at this revision

Child: [r2]

1 2 3 .. 5 > >> (Page 1 of 5)

added	/downloads
added	/downloads/dut
added	/downloads/dut/i2c
added	/downloads/dut/i2c/bench
added	/downloads/dut/i2c/bench/verilog
added	/downloads/dut/i2c/bench/verilog/i2c_slave_model.v
added	/downloads/dut/i2c/bench/verilog/spi_slave_model.v
added	/downloads/dut/i2c/bench/verilog/tst_bench_top.v
added	/downloads/dut/i2c/bench/verilog/wb_master_model.v
added	/downloads/dut/i2c/doc
added	/downloads/dut/i2c/doc/i2c_specs.pdf
added	/downloads/dut/i2c/doc/src
added	/downloads/dut/i2c/doc/src/I2C_specs.doc
added	/downloads/dut/i2c/rtl
added	/downloads/dut/i2c/rtl/verilog
added	/downloads/dut/i2c/rtl/verilog/i2c_master_bit_ctrl.v
added	/downloads/dut/i2c/rtl/verilog/i2c_master_byte_ctrl.v
added	/downloads/dut/i2c/rtl/verilog/i2c_master_defines.v
added	/downloads/dut/i2c/rtl/verilog/i2c_master_top.v
added	/downloads/dut/i2c/rtl/verilog/timescale.v
added	/downloads/dut/i2c/rtl/vhdl
added	/downloads/dut/i2c/rtl/vhdl/I2C.VHD
added	/downloads/dut/i2c/rtl/vhdl/i2c_master_bit_ctrl.vhd
added	/downloads/dut/i2c/rtl/vhdl/i2c_master_byte_ctrl.vhd
added	/downloads/dut/i2c/rtl/vhdl/i2c_master_top.vhd

/downloads

Directory.

/downloads/dut

Directory.

/downloads/dut/i2c

Directory.

/downloads/dut/i2c/bench

Directory.

/downloads/dut/i2c/bench/verilog

Directory.

/downloads/dut/i2c/bench/verilog/i2c_slave_model.v Diff Switch to side-by-side view

/downloads/dut/i2c/bench/verilog/spi_slave_model.v Diff Switch to side-by-side view

/downloads/dut/i2c/bench/verilog/tst_bench_top.v Diff Switch to side-by-side view

/downloads/dut/i2c/bench/verilog/wb_master_model.v Diff Switch to side-by-side view

/downloads/dut/i2c/doc

Directory.

/downloads/dut/i2c/doc/i2c_specs.pdf

Binary file was added.

/downloads/dut/i2c/doc/src

Directory.

/downloads/dut/i2c/doc/src/I2C_specs.doc

Binary file was added.

/downloads/dut/i2c/rtl

Directory.

/downloads/dut/i2c/rtl/verilog

Directory.

/downloads/dut/i2c/rtl/verilog/i2c_master_bit_ctrl.v Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/verilog/i2c_master_byte_ctrl.v Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/verilog/i2c_master_defines.v Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/verilog/i2c_master_top.v Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/verilog/timescale.v Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/vhdl

Directory.

/downloads/dut/i2c/rtl/vhdl/I2C.VHD Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/vhdl/i2c_master_bit_ctrl.vhd Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/vhdl/i2c_master_byte_ctrl.vhd Diff Switch to side-by-side view

/downloads/dut/i2c/rtl/vhdl/i2c_master_top.vhd Diff Switch to side-by-side view

1 2 3 .. 5 > >> (Page 1 of 5)