#2 Redeclared port error

v2.8.2
open
nobody
compile (8)
5
2005-09-17
2005-09-17
Mark Hummel
No

module x(xyz);
output xyz;
reg a;
reg clk;
always @(posedge clk) begin
a <= xyz;
end
reg xyz;
initial begin
$monitor( "a=",a);
xyz = 1;
clk = 0;
#10 clk = 1;
end
endmodule

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