#13 Real values not output to VCD file correctly

[Trevor Williams]

Given the following example, the real values "a" and "b" are output in a binary format that is incorrect (contains X and Z values in the output). These values should be output in a real value format for the sake of compatibility. This examples fails with the 2.8.7 release of Veriwell.

module main;

real a, b;
reg [31:0] c;

initial begin
c = 0;
#5;
c = a + b;
end

initial begin
`ifdef DUMP
$dumpfile( "real2.1.vcd" );
$dumpvars( 0, main );
`endif
a = 1.1;
b = 3.7;
#10;
$finish;
end

endmodule