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From: John v. S. <jc...@cs...> - 2007-03-12 10:30:56
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Hello, I'm currently working on a paper, discussing valgrind from top to bottom. What is a paper without a example, right. So I'm working a really simple example to show the translation that valgrind performs from x86 to IR and back again (including optimization). To clarify the example a bit, I'm translating the numbers indicating the virtual registers of the virtual CPU to their counterparts on a x86 CPU. For example my initial translation is : -- IMark(0x400484, 3) -- ; sub %rcx,%rsi PUT(168) = 0x400484:I64 t12 = GET:I64(48) t11 = GET:I64(8) t10 = Sub64(t12,t11) PUT(128) = 0x8:I64 PUT(136) = t12 PUT(144) = t11 PUT(48) = t10 and I try to clarify it by rewriting it to -- IMark(0x400484, 3) -- ; sub %rcx,%rsi PUT(%RIP) = 0x400484:I64 t12 = GET:I64(%RSI) t11 = GET:I64(%RCX) t10 = Sub64(t12,t11) PUT(%RFLAGS) = 0x8:I64 PUT(136) = t12 PUT(144) = t11 PUT(%RSI) = t10 but as you can see, still some virtual registers are unclear to me. So I basicly have the following question: - Is there a list of these numbers to their virtual counterparts? Regards, John van Schie |
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From: Julian S. <js...@ac...> - 2007-03-12 10:57:17
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> I'm currently working on a paper, discussing valgrind from top to > bottom. What is a paper without a example, right. So I'm working a > really simple example to show the translation that valgrind performs > from x86 to IR and back again (including optimization). x86 or amd64 ? The register names you mention (rcx,rsi,rflags) are amd64 ones, not x86 ones. > PUT(%RFLAGS) = 0x8:I64 > PUT(136) = t12 > PUT(144) = t11 > PUT(%RSI) = t10 The offsets in PUT/GET are offsets into the struct VexGuestAMD64State. Have a look at the comments on its definition. There is no simulated %rflags register directly. Instead, when the flags get set, vex records the operation setting the flags (guest_CC_OP) and the operands (guest_CC_DEP1/DEP2/NDEP), so that the flags can be computed later if needed. Usually they are not needed and so this is much cheaper than computing them every time they are set. See VEX/priv/guest-amd64/gdefs.h, comment starting "%RFLAGS thunk descriptors" for more details. J |
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From: John v. S. <jc...@cs...> - 2007-03-12 11:06:37
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Julian Seward wrote: > x86 or amd64 ? The register names you mention (rcx,rsi,rflags) are > amd64 ones, not x86 ones. > Sorry, AMD64. I'm still used to call it x86_64. > The offsets in PUT/GET are offsets into the struct VexGuestAMD64State. > Have a look at the comments on its definition. > I was ashamed to find them within 30 minutes after posting my question, but then you already replied. For the record, they can be found in VEX/pub/libvex_guest_amd64.h > There is no simulated %rflags register directly. Instead, when > the flags get set, vex records the operation setting the flags > (guest_CC_OP) and the operands (guest_CC_DEP1/DEP2/NDEP), so that > the flags can be computed later if needed. Usually they are not > needed and so this is much cheaper than computing them every > time they are set. > > See VEX/priv/guest-amd64/gdefs.h, comment starting "%RFLAGS thunk > descriptors" for more details. > > J > Thanks for this information! This directly clarified the questions that the definitions raised :) Regards, John |
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From: Tom H. <to...@co...> - 2007-03-12 10:58:31
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> To clarify the example a bit, I'm translating the numbers indicating the > virtual registers of the virtual CPU to their counterparts on a x86 CPU. > > For example my initial translation is : > > -- IMark(0x400484, 3) -- ; sub %rcx,%rsi > PUT(168) = 0x400484:I64 > t12 = GET:I64(48) > t11 = GET:I64(8) > t10 = Sub64(t12,t11) > PUT(128) = 0x8:I64 > PUT(136) = t12 > PUT(144) = t11 > PUT(48) = t10 > > and I try to clarify it by rewriting it to > > -- IMark(0x400484, 3) -- ; sub %rcx,%rsi > PUT(%RIP) = 0x400484:I64 > t12 = GET:I64(%RSI) > t11 = GET:I64(%RCX) > t10 = Sub64(t12,t11) > PUT(%RFLAGS) = 0x8:I64 > PUT(136) = t12 > PUT(144) = t11 > PUT(%RSI) = t10 > > but as you can see, still some virtual registers are unclear to me. > > So I basicly have the following question: > - Is there a list of these numbers to their virtual counterparts? Which numbers do you mean? The tXX temporary register numbers? or the offsets in the PUT() expressions? There is no fixed mapping from the tXX registers to the physical registers - they are just allocated as required and a register allocator is then used to map them to real registers in as efficient a way as possible, just like in a compiler. The offsets in the PUT() expressions come from the structure at the top of the VEX/priv/libvex_guest_XXX.h files. Tom -- Tom Hughes (to...@co...) http://www.compton.nu/ |