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From: Knapp, R. L <ras...@in...> - 2016-09-02 00:05:37
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Hello, With many new platforms hitting the market which include AVX-512 instruction extensions, and as a valgrind user, I want to inquire about Valgrind's development underway to support these instructions. I will appreciate any information available regarding this. Regards, Rashawn Knapp Intel Corporation |
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From: Mark W. <mj...@re...> - 2016-09-05 14:16:34
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On Fri, 2016-09-02 at 00:05 +0000, Knapp, Rashawn L wrote: > With many new platforms hitting the market which include AVX-512 > instruction extensions, and as a valgrind user, I want to inquire > about Valgrind’s development underway to support these instructions. > I will appreciate any information available regarding this. As far as I know nobody is currently working on AVX-512 instruction and the new larger register support in valgrind. I don't even see a bug report requesting it. If someone does have hardware that supports AVX-512 it would be great if they could work on support for it. But wikipedia claims there is not much hardware out there (yet?) that has support for it: https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512 Given your email address you might also want to ask people at Intel if they think AVX-512 support for valgrind would be useful and whether they could help with implementing support for it. Thanks, Mark |
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From: Jeff H. <jef...@gm...> - 2016-09-05 16:31:50
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On Monday, September 5, 2016, Mark Wielaard <mj...@re...> wrote: > On Fri, 2016-09-02 at 00:05 +0000, Knapp, Rashawn L wrote: > > With many new platforms hitting the market which include AVX-512 > > instruction extensions, and as a valgrind user, I want to inquire > > about Valgrind’s development underway to support these instructions. > > I will appreciate any information available regarding this. > > As far as I know nobody is currently working on AVX-512 instruction and > the new larger register support in valgrind. I don't even see a bug > report requesting it. If someone does have hardware that supports > AVX-512 it would be great if they could work on support for it. There is a good chance we can arrange remote access to hardware within Intel. Otherwise I can ask one of the DOE labs that has test hardware if they can help. (A lab that doesn't have onerous remote access limitations...). If all else fails, we loan out development boxes for certain purposes. > > But > wikipedia claims there is not much hardware out there (yet?) that has > support for it: https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512 > > Intel Xeon Phi 72xx aka Knights Landing is the only generally available product that supports it. Numerous unofficial sources and slides on GCC AVX-512 support by Intel describe another implementation. > Given your email address you might also want to ask people at Intel if > they think AVX-512 support for valgrind would be useful and whether they > could help with implementing support for it. > > It would be really valuable to a number of HPC programmers. Many DOE labs use it heavily. I wish I could help implement but I don't have the relevant skills. Jeff, who also works for Intel > Thanks, > > Mark > > ------------------------------------------------------------ > ------------------ > _______________________________________________ > Valgrind-developers mailing list > Val...@li... <javascript:;> > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > -- Jeff Hammond jef...@gm... http://jeffhammond.github.io/ |
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From: Knapp, R. L <ras...@in...> - 2016-09-05 19:57:30
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Petar and others on the Valgrind lists, I asked this question because of just what Jeff states that there are many HPC programmers and HPC laboratories which use Valgrind extensively. I do not mind opening a KDE bug discussion, but after not finding anything on this topic after searching through the KDE archive and the mailing lists archives, I thought first to ask via the mailing lists if anyone is currently working on contributing AVX-512 support to Valgrind. Intel's Knights Landing processor has shipped with AVX-512: https://software.intel.com/en-us/articles/intel-xeon-phi-x200-family-processor-performance-monitoring-reference-manual. From the KDE bug discussions for AVX2 (https://bugs.kde.org/show_bug.cgi?id=305728 ), I realize adding AVX-512 support is a large piece of development. Thank you all for your inputs. I will open up a KDE bug discussion on this topic. Regards, Rashawn Knapp, Intel Corporation -----Original Message----- From: Petar Jovanovic [mailto:mip...@gm...] Sent: Monday, September 05, 2016 11:48 AM To: Jeff Hammond <jef...@gm...> Cc: val...@li...; val...@li...; Mark Wielaard <mj...@re...> Subject: Re: [Valgrind-developers] [Valgrind-users] AVX-512 support inquiry On Mon, Sep 5, 2016 at 6:31 PM, Jeff Hammond <jef...@gm...> wrote: > > It would be really valuable to a number of HPC programmers. Many DOE > labs use it heavily. I wish I could help implement but I don't have > the relevant skills. > It may be worth to open a bug at kde and track future discussion there. Regards, Petar ------------------------------------------------------------------------------ _______________________________________________ Valgrind-developers mailing list Val...@li... https://lists.sourceforge.net/lists/listinfo/valgrind-developers |
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From: Julian S. <js...@ac...> - 2016-09-07 08:23:40
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Yes, I have seen AVX-512 looming on the horizon for a while. Yes, we should support it. Dealing with AVX/AVX2 was a lot of work, and there is not much AVX-512 available hardware out there, which may explain the relative lack of activity so far. I would be willing to make the infrastructural changes in VEX and Valgrind necessary to provide a framework in which we can incrementally add support for individual instructions. That would be: addition of support for 512 bit registers, changes in the front end instruction decoding framework, and changes in the back end (if any required, possibly none). One problem is the lack of hardware. As I understand it, some but not all Skylake CPUs support AVX-512. Having said that, if you are really looking for a working implementation on Knights Landing then it would be necessary to test any implementation both on Skylake+AVX512 and Knights Landing. A good description of the instruction set is also necessary. Is that publically available? Can you make available, reliable, administrative-hassle-free remote access to a box that supports AVX-512? J > -----Original Message----- > From: Petar Jovanovic [mailto:mip...@gm...] > Sent: Monday, September 05, 2016 11:48 AM > To: Jeff Hammond <jef...@gm...> > Cc: val...@li...; val...@li...; Mark Wielaard <mj...@re...> > Subject: Re: [Valgrind-developers] [Valgrind-users] AVX-512 support inquiry > > On Mon, Sep 5, 2016 at 6:31 PM, Jeff Hammond <jef...@gm...> wrote: >> >> It would be really valuable to a number of HPC programmers. Many DOE >> labs use it heavily. I wish I could help implement but I don't have >> the relevant skills. >> > > It may be worth to open a bug at kde and track future discussion there. |
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From: Philippe W. <phi...@sk...> - 2016-09-07 19:33:21
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On Wed, 2016-09-07 at 10:23 +0200, Julian Seward wrote: > Yes, I have seen AVX-512 looming on the horizon for a while. Yes, we > should support it. Dealing with AVX/AVX2 was a lot of work, and there is > not much AVX-512 available hardware out there, which may explain the > relative lack of activity so far. > > I would be willing to make the infrastructural changes in VEX and Valgrind > necessary to provide a framework in which we can incrementally add support > for individual instructions. That would be: addition of support for 512 > bit registers, changes in the front end instruction decoding framework, and > changes in the back end (if any required, possibly none). > > One problem is the lack of hardware. As I understand it, some but not > all Skylake CPUs support AVX-512. Having said that, if you are really > looking for a working implementation on Knights Landing then it would > be necessary to test any implementation both on Skylake+AVX512 and > Knights Landing. > > A good description of the instruction set is also necessary. Is that > publically available? > > Can you make available, reliable, administrative-hassle-free > remote access to a box that supports AVX-512? Assuming there is an access to an AVX512 box, I can take in charge the updates needed for valgrind gdbserver. Note that one admin hassle free way to provide such a box is for intel to donate such a box to gcc compile farm (and maybe even better, to host it). Philippe |
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From: Jeffrey W. <nol...@gm...> - 2016-09-07 20:09:23
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>> Can you make available, reliable, administrative-hassle-free >> remote access to a box that supports AVX-512? > Assuming there is an access to an AVX512 box, I can take in charge > the updates needed for valgrind gdbserver. > > Note that one admin hassle free way to provide such a box is > for intel to donate such a box to gcc compile farm (and maybe even > better, to host it). +1. I was thinking the same thing - host a farm or donate a couple of machines to the GCC compile farm. Jeff |
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From: Knapp, R. L <ras...@in...> - 2016-09-07 20:14:00
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Hi all, I am working on this idea. I will let you know more when I have more information. Regards, -Rashawn -----Original Message----- From: Jeffrey Walton [mailto:nol...@gm...] Sent: Wednesday, September 07, 2016 1:09 PM To: Philippe Waroquiers <phi...@sk...> Cc: val...@li...; js...@ac...; Petar Jovanovic <mip...@gm...>; val...@li... Subject: Re: [Valgrind-users] [Valgrind-developers] AVX-512 support inquiry >> Can you make available, reliable, administrative-hassle-free remote >> access to a box that supports AVX-512? > Assuming there is an access to an AVX512 box, I can take in charge the > updates needed for valgrind gdbserver. > > Note that one admin hassle free way to provide such a box is for intel > to donate such a box to gcc compile farm (and maybe even better, to > host it). +1. I was thinking the same thing - host a farm or donate a couple of machines to the GCC compile farm. Jeff ------------------------------------------------------------------------------ _______________________________________________ Valgrind-users mailing list Val...@li... https://lists.sourceforge.net/lists/listinfo/valgrind-users |
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From: Mark W. <mj...@re...> - 2016-09-22 12:35:54
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On Wed, 2016-09-07 at 10:23 +0200, Julian Seward wrote: > A good description of the instruction set is also necessary. Is that > publically available? It seems Intel moves it around from time to time, because my old bookmarks don't work anymore. But I found a recent description of avx-512 at https://software.intel.com/sites/default/files/managed/69/78/319433-025.pdf |
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From: Knapp, R. L <ras...@in...> - 2016-09-22 13:20:17
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Hello, Some of these may have been mentioned previously. I find the following Intel published AVX-512 documents: 1. Combined Volume Set of Intel® 64 and IA-32 Architectures Software Developer’s Manuals, from http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html : http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf -- Volume 2, chapter 2 http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developers-manual.pdf -- update/errata to above 2. Intel® Architecture Instruction Set Extensions Programming Reference: https://software.intel.com/sites/default/files/managed/69/78/319433-025.pdf In addition to the above, the Knights Landing manuals are: ‐ Intel® Xeon Phi™ Processor, Performance Monitoring Reference Manual – Volume 1: Registers, Revision 1.0, June 2016: https://software.intel.com/sites/default/files/managed/28/16/Intel%C2%AEXeonPhi%E2%84%A2ProcessorPerformanceMonitoringReferenceManual_Volume1_Register_rev1.0_Jun2016..pdf ‐ Intel® Xeon Phi™ Processor Performance Monitoring Reference Manual—Volume 2: Events, Revision 1.0, June 2016: https://software.intel.com/sites/default/files/managed/db/9d/Intel%20Xeon%20Phi%E2%84%A2%20Processor%20Performance%20Monitoring%20Reference%20Manual_Vol2_rev1.0_Jun2016.pdf Regards, Rashawn Knapp Software Development Engineer, Intel Corporation -----Original Message----- From: Mark Wielaard [mailto:mj...@re...] Sent: Thursday, September 22, 2016 5:36 AM To: js...@ac... Cc: Knapp, Rashawn L <ras...@in...>; Petar Jovanovic <mip...@gm...>; val...@li...; val...@li... Subject: Re: [Valgrind-users] [Valgrind-developers] AVX-512 support inquiry On Wed, 2016-09-07 at 10:23 +0200, Julian Seward wrote: > A good description of the instruction set is also necessary. Is that > publically available? It seems Intel moves it around from time to time, because my old bookmarks don't work anymore. But I found a recent description of avx-512 at https://software.intel.com/sites/default/files/managed/69/78/319433-025.pdf |
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