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From: Andrew C. <ajc...@gm...> - 2013-03-25 06:12:03
Attachments:
float_types_amd64.diff
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I've noticed that the register type used for the "movss" and "movsd" instructions is Ity_I32 or Ity_I64. I wonder if this should be Ity_F32 and Ity_F64? I believe these instructions are normally used for floating point values. This came up as I was trying to categorize memory references by type and found that regardless of whether floating point instructions were used, the load/store reported an integer type. There may be other instructions with the same problem. Attached is the diff that seems to fix this special case. Andrew |
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From: Andrew C. <ajc...@gm...> - 2013-03-26 14:11:24
Attachments:
float_types_amd64.diff
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Here's a slightly more complete patch that also changes other mov* SSE instructions to float type. Does this change seem reasonable? On Mon, Mar 25, 2013 at 2:11 AM, Andrew Clinton <ajc...@gm...> wrote: > I've noticed that the register type used for the "movss" and "movsd" > instructions is Ity_I32 or Ity_I64. I wonder if this should be > Ity_F32 and Ity_F64? I believe these instructions are normally used > for floating point values. This came up as I was trying to categorize > memory references by type and found that regardless of whether > floating point instructions were used, the load/store reported an > integer type. There may be other instructions with the same problem. > > Attached is the diff that seems to fix this special case. > > Andrew |
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From: Julian S. <js...@ac...> - 2013-03-29 09:18:42
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On 03/26/2013 03:11 PM, Andrew Clinton wrote: > Here's a slightly more complete patch that also changes other mov* SSE > instructions to float type. Does this change seem reasonable? It seems plausible. My main concern would be to ensure this doesn't cause any performance regressions by interfering with IR level optimisation. Can you file a bug in bugzilla and attach it to that? Patches sent to the mailing list tend to become lost or forgotten about. J |
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From: Andrew C. <ajc...@gm...> - 2013-03-30 03:30:32
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Thanks - I submitted a bug: https://bugs.kde.org/show_bug.cgi?id=317581 I'm aware that what I'm trying to do (accurately identify types for each memory access) isn't always possible, and this patch improves things but isn't a complete fix. Do you think that a bit of analysis on the IR (eg. tracing back from a store to find out what instruction originated the value being stored) might help to improve the identification process? Does any type inference happen before the IR is passed to the instrumentation routine that might help? On Fri, Mar 29, 2013 at 5:18 AM, Julian Seward <js...@ac...> wrote: > On 03/26/2013 03:11 PM, Andrew Clinton wrote: > > Here's a slightly more complete patch that also changes other mov* SSE > > instructions to float type. Does this change seem reasonable? > > It seems plausible. My main concern would be to ensure this doesn't > cause any performance regressions by interfering with IR level > optimisation. > > Can you file a bug in bugzilla and attach it to that? Patches sent to > the mailing list tend to become lost or forgotten about. > > J > > > |