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From: Abe S. <abe...@ya...> - 2016-08-29 21:22:00
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Dear all,
Please excuse my abruptness as I cut to the chase. If anybody wants a brief introduction from me on myself/{my work}/both, since this is the first time I`m posting to a Valgrind list, please let me know.
Basically what I want nowadays [and can`t seem to figure out on my own how to get it] is a means of running a program -- an AArch64 GNU/Linux or Android/Linux program, to be more specific -- and get statistics on the alignments of its memory accesses. In other words, on a RISC target, I want to instrument the loads and stores.
I want _very_ detailed information, partly since what I currently have in mind is an unusually-strict meaning of the word "unaligned", and partly because highly-detailed statistics, once gathered, can usually be easily and validly collapsed to a less-granular set of statistics, whereas the reverse [less-detailed to more-detailed] is never-or-rarely possible/valid/both.
To be precise, for every load/store, I want to know:
* the alignment that was present at run-time
* the size of the loaded/stored data
These statistics can be collected in aggregate, since the size of the output would probably be prohibitive if one were to collect the "stream-of-consciousness" access stats for each and every memory-touching instruction that runs, especially as a dynamic count [i.e. each execution of a given static instruction counting separately]. The result would be a dump of a hash map, e.g. from {alignment, size} to {hit count}.
Although byte-wise statistics would be sufficient for my current needs, and the numbers could even be in log-base-two form for those needs [i.e. storing the # of bottom-of-address clear bits], if a new tool is needed there are options that IMO are more flexible:
* [more flexible than log-base-two form]: keep track of the # of bytes of alignment/size rather than
#-of-zero-bits-at-bottom-of-address-or-size; this would support odd architectures [perhaps GPUs, with 24-bit pixels?]
where the datum to be loaded or stored is _not_ a nonNegative-integer-power-of-two [e.g. 8, 16, 32 ...] number of bits wide.
* [even more flexible than the preceding]: keep track of the # of _bits_ that were loaded/stored etc. rather than the # of bytes;
this enables support for non-{integer-number-of-bytes} accesses, e.g. 36-bit accesses on certain mainframe ISAs
If anybody reading this knows how to do this using existing Valgrind code, please help me by explaining. Needing to get fresh Valgrind from Subversion is not a major roadblock.
If the above requires a whole new tool, then I am willing to try to write it, but I`ll need help. In particular, I`m worried about the AArch64 pair-of-register load/store instructions, which I want to track as single accesses. For example, "loadp q0, q1, [x0]", which loads two 128-bit vector registers in a single instruction, should count as a single 256-bit access. I don`t know whether or not the translation to VEX and back makes the preceding difficult/impossible.
If the preceding requires a new tool, then I propose the name "Alignmentgrind". ;-)
Regards,
Abe
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