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From: Bart V. A. <bva...@ac...> - 2011-07-30 10:15:17
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On Fri, Jul 29, 2011 at 10:05 PM, Christian Borntraeger <bor...@de...> wrote: > Nightly build on fedora390 ( Fedora 13/14/15 mix with gcc 3.5.3 on z196 (s390x) ) > Started at 2011-07-29 21:45:01 CEST > Ended at 2011-07-29 22:05:23 CEST > Results differ from 24 hours ago Hello, Below you can find the output of zgrep -i vex diffs.gz for the nightly build on z196. Does that mean there is still some work on the z196 port of VEX ? +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex: priv/guest_generic_bb_to_IR.c:327 (bb_to_IR): Assertion `dres.continueAt == 0' failed. +vex storage: T total 157315936 bytes allocated +vex storage: P total 0 bytes allocated + LibVEX called failure_exit(). + by 0x........: vex_assert_fail (main_util.c:219) + by 0x........: LibVEX_Translate (main_main.c:506) +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex: priv/guest_generic_bb_to_IR.c:327 (bb_to_IR): Assertion `dres.continueAt == 0' failed. +vex storage: T total 157315936 bytes allocated +vex storage: P total 0 bytes allocated + LibVEX called failure_exit(). + by 0x........: vex_assert_fail (main_util.c:219) + by 0x........: LibVEX_Translate (main_main.c:506) +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 +vex s390->IR: unknown insn: 0000 Bart. |
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From: Christian B. <bor...@de...> - 2011-07-30 15:02:35
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> Below you can find the output of zgrep -i vex diffs.gz for the nightly > build on z196. Does that mean there is still some work on the z196 > port of VEX ? > > +vex s390->IR: unknown insn: 0000 > +vex s390->IR: unknown insn: 0000 > +vex s390->IR: unknown insn: 0000 > +vex s390->IR: unknown insn: 0000 > +vex: priv/guest_generic_bb_to_IR.c:327 (bb_to_IR): Assertion > `dres.continueAt == 0' failed. Something else is wrong (of course it might be s390 code), but instruction opcode 0 is guaranteed to be never used, so it is either a jump to a place that does not contain code or some trap etc. that is supposed to fault. But VEX does not need to handle 0000. Christian |
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From: Christian B. <bor...@de...> - 2011-08-07 19:50:45
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On 30/07/11 17:44, Florian Krohm wrote:
> On 07/30/2011 11:02 AM, Christian Borntraeger wrote:
>>>
>>> +vex s390->IR: unknown insn: 0000
>>> +vex s390->IR: unknown insn: 0000
>>> +vex s390->IR: unknown insn: 0000
>>> +vex s390->IR: unknown insn: 0000
>>> +vex: priv/guest_generic_bb_to_IR.c:327 (bb_to_IR): Assertion
>>> `dres.continueAt == 0' failed.
>>
>> Something else is wrong (of course it might be s390 code), but instruction
>> opcode 0 is guaranteed to be never used, so it is either a jump to a place
>> that does not contain code or some trap etc. that is supposed to fault. But
>> VEX does not need to handle 0000.
>>
>
> Right, this is just the symptom. The cause might be my change r2185 in
> VEX. I'm looking at that.
I found some time to look at the ex_clone testcase. The error comes from
decoding libcs abort function coming from base_from_cb_data
(which was not done before we had resteer)
[...]
3b7f6: e3 10 d0 00 00 12 lt %r1,0(%r13)
3b7fc: a7 84 00 e6 je 3b9c8 <abort+0x234>
3b800: a7 1e 00 01 chi %r1,1
3b804: a7 84 00 d5 je 3b9ae <abort+0x21a>
3b808: a7 1e 00 02 chi %r1,2
3b80c: a7 84 00 43 je 3b892 <abort+0xfe>
3b810: a7 1e 00 03 chi %r1,3
3b814: a7 84 00 a2 je 3b958 <abort+0x1c4>
3b818: a7 1e 00 04 chi %r1,4
3b81c: a7 84 00 30 je 3b87c <abort+0xe8>
3b820: a7 1e 00 05 chi %r1,5
3b824: a7 84 00 1f je 3b862 <abort+0xce>
3b828: a7 1e 00 06 chi %r1,6
3b82c: a7 84 00 11 je 3b84e <abort+0xba>
3b830: a7 1e 00 07 chi %r1,7
3b834: a7 84 00 0e je 3b850 <abort+0xbc>
3b838: 00 00 a7 f4 .long 0x0000a7f4
3b83c: ff ff c0 20 .long 0xffffc020
3b840: 00 0b bf 81 .long 0x000bbf81
[...]
the code in question is
[...]
if (stage == 7)
{
++stage;
_exit (127);
}
[...]
while (1)
/* Try for ever and ever. */
ABORT_INSTRUCTION;
and ABORT_INSTRUCTION is defined as
"asm (".word 0")"
Florian, looks like we should treat 0000 special.
Christian
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From: Florian K. <br...@ac...> - 2011-08-08 18:25:53
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On 08/07/2011 03:50 PM, Christian Borntraeger wrote:
> On 30/07/11 17:44, Florian Krohm wrote:
>> On 07/30/2011 11:02 AM, Christian Borntraeger wrote:
>>>>
>
> I found some time to look at the ex_clone testcase. The error comes from
> decoding libcs abort function coming from base_from_cb_data
> (which was not done before we had resteer)
>
>
> the code in question is
> [...]
> if (stage == 7)
> {
> ++stage;
> _exit (127);
> }
> [...]
> while (1)
> /* Try for ever and ever. */
> ABORT_INSTRUCTION;
>
>
>
> and ABORT_INSTRUCTION is defined as
> "asm (".word 0")"
>
>
> Florian, looks like we should treat 0000 special.
>
Thanks for investigating this. So we're decoding 0000 although we're
never executing this because we leave the superblock earlier via a
conditional branch. Makes sense.
I'm going to tentatively apply this here (because I can't reproduce
the DRD failures on my box):
Index: VEX/priv/guest_s390_toIR.c
===================================================================
--- VEX/priv/guest_s390_toIR.c (revision 2187)
+++ VEX/priv/guest_s390_toIR.c (working copy)
@@ -2064,6 +2064,26 @@
/*------------------------------------------------------------*/
static HChar *
+s390_irgen_00(UChar r1 __attribute__((unused)),
+ UChar r2 __attribute__((unused)))
+{
+ IRDirty *d;
+
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
+ mkIRExprVec_0());
+ d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
+
+ d->fxState[0].fx = Ifx_Modify; /* read then write */
+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
+ d->fxState[0].size = sizeof(ULong);
+ d->nFxState = 1;
+
+ stmt(IRStmt_Dirty(d));
+
+ return "00";
+}
+
+static HChar *
s390_irgen_AR(UChar r1, UChar r2)
{
IRTemp op1 = newTemp(Ity_I32);
@@ -10688,6 +10708,8 @@
((char *)(&ovl.value))[1] = bytes[1];
switch (ovl.value & 0xffff) {
+ case 0x0000: /* invalid opcode */
+ s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
case 0x0101: /* PR */ goto unimplemented;
case 0x0102: /* UPT */ goto unimplemented;
case 0x0104: /* PTFF */ goto unimplemented;
Index: VEX/priv/guest_s390_defs.h
===================================================================
--- VEX/priv/guest_s390_defs.h (revision 2186)
+++ VEX/priv/guest_s390_defs.h (working copy)
@@ -74,6 +74,7 @@
/*------------------------------------------------------------*/
/*--- Dirty Helper functions. ---*/
/*------------------------------------------------------------*/
+void s390x_dirtyhelper_00(VexGuestS390XState *guest_state);
void s390x_dirtyhelper_EX(ULong torun);
ULong s390x_dirtyhelper_STCK(ULong *addr);
ULong s390x_dirtyhelper_STCKF(ULong *addr);
Index: VEX/priv/guest_s390_helpers.c
===================================================================
--- VEX/priv/guest_s390_helpers.c (revision 2186)
+++ VEX/priv/guest_s390_helpers.c (working copy)
@@ -227,6 +227,21 @@
};
/*------------------------------------------------------------*/
+/*--- Dirty helper for invalid opcode 00 ---*/
+/*------------------------------------------------------------*/
+#if defined(VGA_s390x)
+void
+s390x_dirtyhelper_00(VexGuestS390XState *guest_state)
+{
+ /* Avoid infinite loop in case SIGILL is caught. See also
+ none/tests/s390x/op_exception.c */
+ guest_state->guest_IA += 2;
+
+ asm volatile(".hword 0\n");
+}
+#endif
+
+/*------------------------------------------------------------*/
/*--- Dirty helper for EXecute ---*/
/*------------------------------------------------------------*/
void
and we'll see how this helps.
It'll make op_exception fail. I'll fix that later should this patch
become permanent.
Florian
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From: Christian B. <bor...@de...> - 2011-08-08 19:56:26
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> Thanks for investigating this. So we're decoding 0000 although we're > never executing this because we leave the superblock earlier via a > conditional branch. Makes sense. > > I'm going to tentatively apply this here (because I can't reproduce > the DRD failures on my box): Seems that resteer can handle a decode failure, since we dont see valgrind: Unrecognised instruction at address 0x.. Maybe we could just get rid of the print? Or we could do the same as for execute - stop decoding if the next instruction is 0x0000? Dont know. Christian |