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From: Julian S. <se...@so...> - 2018-09-14 11:22:30
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=27194eb985b22a66b439925e821a41800bcb881e commit 27194eb985b22a66b439925e821a41800bcb881e Author: Julian Seward <js...@ac...> Date: Fri Sep 14 13:19:34 2018 +0200 Bug 397089 - Incorrect decoding of three-register vmovss/vmovsd opcode 11h. This fixes the incorrect 11h decoding of three-register vmovss/vmovsd. Patch from Tomas Trnka (tom...@gm...). Diff: --- VEX/priv/guest_amd64_toIR.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c index f462030..2cabf80 100644 --- a/VEX/priv/guest_amd64_toIR.c +++ b/VEX/priv/guest_amd64_toIR.c @@ -24234,12 +24234,12 @@ Long dis_ESC_0F__VEX ( UInt rV = getVexNvvvv(pfx); delta++; DIP("vmovsd %s,%s,%s\n", - nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG)); + nameXMMReg(rG), nameXMMReg(rV), nameXMMReg(rE)); IRTemp res = newTemp(Ity_V128); assign(res, binop(Iop_64HLtoV128, getXMMRegLane64(rV, 1), - getXMMRegLane64(rE, 0))); - putYMMRegLoAndZU(rG, mkexpr(res)); + getXMMRegLane64(rG, 0))); + putYMMRegLoAndZU(rE, mkexpr(res)); *uses_vvvv = True; goto decode_success; } @@ -24264,14 +24264,14 @@ Long dis_ESC_0F__VEX ( UInt rV = getVexNvvvv(pfx); delta++; DIP("vmovss %s,%s,%s\n", - nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG)); + nameXMMReg(rG), nameXMMReg(rV), nameXMMReg(rE)); IRTemp res = newTemp(Ity_V128); assign( res, binop( Iop_64HLtoV128, getXMMRegLane64(rV, 1), binop(Iop_32HLto64, getXMMRegLane32(rV, 1), - getXMMRegLane32(rE, 0)) ) ); - putYMMRegLoAndZU(rG, mkexpr(res)); + getXMMRegLane32(rG, 0)) ) ); + putYMMRegLoAndZU(rE, mkexpr(res)); *uses_vvvv = True; goto decode_success; } |