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From: <sv...@va...> - 2015-04-11 14:33:01
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Author: philippe
Date: Sat Apr 11 15:32:53 2015
New Revision: 3125
Log:
VEX side for revision 15084 (multi arch testing)
Modified:
trunk/priv/host_arm64_isel.c
trunk/priv/host_mips_defs.c
trunk/pub/libvex_guest_amd64.h
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Sat Apr 11 15:32:53 2015
@@ -3849,6 +3849,12 @@
case Ist_IMark:
return;
+ /* --------- ABI HINT --------- */
+ /* These have no meaning (denotation in the IR) and so we ignore
+ them ... if any actually made it this far. */
+ case Ist_AbiHint:
+ return;
+
/* --------- NO-OP --------- */
case Ist_NoOp:
return;
Modified: trunk/priv/host_mips_defs.c
==============================================================================
--- trunk/priv/host_mips_defs.c (original)
+++ trunk/priv/host_mips_defs.c Sat Apr 11 15:32:53 2015
@@ -2070,7 +2070,18 @@
*p++ = toUChar((w32 >> 8) & 0x000000FF);
*p++ = toUChar((w32 >> 16) & 0x000000FF);
*p++ = toUChar((w32 >> 24) & 0x000000FF);
-#elif defined (_MIPSEB)
+/* HACK !!!!
+ MIPS endianess is decided at compile time using gcc defined
+ symbols _MIPSEL or _MIPSEB. When compiling libvex in a cross-arch
+ setup, then none of these is defined. We just choose here by default
+ mips Big Endian to allow libvexmultiarch_test to work when using
+ a mips host architecture.
+ A cleaner way would be to either have mips using 'dynamic endness'
+ (like ppc64be or le, decided at runtime) or at least defining
+ by default _MIPSEB when compiling on a non mips system.
+#elif defined (_MIPSEB).
+*/
+#else
*p++ = toUChar((w32 >> 24) & 0x000000FF);
*p++ = toUChar((w32 >> 16) & 0x000000FF);
*p++ = toUChar((w32 >> 8) & 0x000000FF);
Modified: trunk/pub/libvex_guest_amd64.h
==============================================================================
--- trunk/pub/libvex_guest_amd64.h (original)
+++ trunk/pub/libvex_guest_amd64.h Sat Apr 11 15:32:53 2015
@@ -124,6 +124,7 @@
delicately-balanced PutI/GetI optimisation machinery.
Therefore best to leave it as a UInt. */
UInt guest_FTOP;
+ UInt pad1;
ULong guest_FPREG[8];
UChar guest_FPTAG[8];
ULong guest_FPROUND;
@@ -131,6 +132,7 @@
/* Emulation notes */
UInt guest_EMNOTE;
+ UInt pad2;
/* Translation-invalidation area description. Not used on amd64
(there is no invalidate-icache insn), but needed so as to
@@ -167,7 +169,7 @@
ULong guest_IP_AT_SYSCALL;
/* Padding to make it have an 16-aligned size */
- ULong pad1;
+ ULong pad3;
}
VexGuestAMD64State;
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