Author: sewardj
Date: Fri Apr 10 13:30:09 2015
New Revision: 15080
Log:
Add a port to Linux/TileGx. Zhi-Gang Liu (zl...@ti...)
Valgrind aspects, to match vex r3124.
See bug 339778 - Linux/TileGx platform support to Valgrind
Added:
trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S
trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c
trunk/coregrind/m_sigframe/sigframe-tilegx-linux.c
trunk/coregrind/m_syswrap/syscall-tilegx-linux.S
trunk/coregrind/m_syswrap/syswrap-tilegx-linux.c
trunk/include/vki/vki-posixtypes-tilegx-linux.h
trunk/include/vki/vki-scnums-tilegx-linux.h
trunk/include/vki/vki-tilegx-linux.h
trunk/memcheck/tests/origin5-bz2.stderr.exp-glibc212-tilegx
trunk/memcheck/tests/origin6-fp.stderr.exp-glibc212-tilegx
trunk/none/tests/tilegx/
trunk/none/tests/tilegx/Makefile.am
trunk/none/tests/tilegx/allexec.c
Modified:
trunk/Makefile.all.am
trunk/Makefile.tool.am
trunk/Makefile.vex.am
trunk/cachegrind/cg_arch.c
trunk/cachegrind/cg_branchpred.c
trunk/configure.ac
trunk/coregrind/Makefile.am
trunk/coregrind/launcher-linux.c
trunk/coregrind/m_aspacemgr/aspacemgr-common.c
trunk/coregrind/m_cache.c
trunk/coregrind/m_coredump/coredump-elf.c
trunk/coregrind/m_debugger.c
trunk/coregrind/m_debuginfo/d3basics.c
trunk/coregrind/m_debuginfo/debuginfo.c
trunk/coregrind/m_debuginfo/priv_storage.h
trunk/coregrind/m_debuginfo/readdwarf.c
trunk/coregrind/m_debuginfo/readelf.c
trunk/coregrind/m_debuginfo/storage.c
trunk/coregrind/m_debuglog.c
trunk/coregrind/m_gdbserver/target.c
trunk/coregrind/m_gdbserver/valgrind_low.h
trunk/coregrind/m_initimg/initimg-linux.c
trunk/coregrind/m_libcassert.c
trunk/coregrind/m_libcfile.c
trunk/coregrind/m_libcproc.c
trunk/coregrind/m_machine.c
trunk/coregrind/m_main.c
trunk/coregrind/m_redir.c
trunk/coregrind/m_scheduler/scheduler.c
trunk/coregrind/m_signals.c
trunk/coregrind/m_stacktrace.c
trunk/coregrind/m_syscall.c
trunk/coregrind/m_syswrap/priv_types_n_macros.h
trunk/coregrind/m_syswrap/syswrap-linux.c
trunk/coregrind/m_syswrap/syswrap-main.c
trunk/coregrind/m_trampoline.S
trunk/coregrind/m_translate.c
trunk/coregrind/pub_core_aspacemgr.h
trunk/coregrind/pub_core_basics.h
trunk/coregrind/pub_core_debuginfo.h
trunk/coregrind/pub_core_machine.h
trunk/coregrind/pub_core_mallocfree.h
trunk/coregrind/pub_core_syscall.h
trunk/coregrind/pub_core_trampoline.h
trunk/coregrind/pub_core_transtab_asm.h
trunk/coregrind/vgdb-invoker-ptrace.c
trunk/docs/internals/register-uses.txt
trunk/drd/drd_bitmap.h
trunk/drd/drd_clientreq.c
trunk/drd/drd_load_store.c
trunk/exp-sgcheck/pc_main.c
trunk/exp-sgcheck/tests/is_arch_supported
trunk/gdbserver_tests/mcblocklistsearch.vgtest
trunk/gdbserver_tests/nlcontrolc.vgtest
trunk/gdbserver_tests/nlgone_return.vgtest
trunk/helgrind/tests/annotate_hbefore.c
trunk/helgrind/tests/tc07_hbl1.c
trunk/helgrind/tests/tc08_hbl2.c
trunk/helgrind/tests/tc11_XCHG.c
trunk/include/pub_tool_basics.h
trunk/include/pub_tool_guest.h
trunk/include/pub_tool_machine.h
trunk/include/pub_tool_vkiscnums_asm.h
trunk/include/valgrind.h
trunk/include/vki/vki-linux.h
trunk/massif/tests/Makefile.am
trunk/memcheck/mc_machine.c
trunk/memcheck/tests/Makefile.am
trunk/memcheck/tests/atomic_incs.c
trunk/memcheck/tests/leak-segv-jmp.c
trunk/memcheck/tests/vbit-test/irops.c
trunk/memcheck/tests/vbit-test/vtest.h
trunk/none/tests/Makefile.am
trunk/none/tests/allexec_prepare_prereq
trunk/tests/arch_test.c
Modified: trunk/Makefile.all.am
==============================================================================
--- trunk/Makefile.all.am (original)
+++ trunk/Makefile.all.am Fri Apr 10 13:30:09 2015
@@ -234,6 +234,9 @@
$(AM_CFLAGS_PSO_BASE)
AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @FLAG_MIPS64@
+AM_CFLAGS_TILEGX_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CFLAGS_PSO_TILEGX_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) $(AM_CFLAGS_PSO_BASE)
+
# Flags for the primary target. These must be used to build the
# regtests and performance tests. In fact, these must be used to
# build anything which is built only once on a dual-arch build.
@@ -274,4 +277,5 @@
PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_TILEGX_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
Modified: trunk/Makefile.tool.am
==============================================================================
--- trunk/Makefile.tool.am (original)
+++ trunk/Makefile.tool.am Fri Apr 10 13:30:09 2015
@@ -76,6 +76,9 @@
-static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \
@FLAG_M64@
+TOOL_LDFLAGS_TILEGX_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+
# On Android we must ask for non-executable stack, not sure why.
if VGCONF_PLATFORMS_INCLUDE_ARM_LINUX
if VGCONF_PLATVARIANT_IS_ANDROID
@@ -132,6 +135,9 @@
LIBREPLACEMALLOC_MIPS64_LINUX = \
$(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a
+LIBREPLACEMALLOC_TILEGX_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-tilegx-linux.a
+
LIBREPLACEMALLOC_LDFLAGS_X86_LINUX = \
-Wl,--whole-archive \
$(LIBREPLACEMALLOC_X86_LINUX) \
@@ -188,6 +194,11 @@
$(LIBREPLACEMALLOC_MIPS64_LINUX) \
-Wl,--no-whole-archive
+LIBREPLACEMALLOC_LDFLAGS_TILEGX_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_TILEGX_LINUX) \
+ -Wl,--no-whole-archive
+
#----------------------------------------------------------------------------
# General stuff
#----------------------------------------------------------------------------
Modified: trunk/Makefile.vex.am
==============================================================================
--- trunk/Makefile.vex.am (original)
+++ trunk/Makefile.vex.am Fri Apr 10 13:30:09 2015
@@ -26,6 +26,7 @@
pub/libvex_guest_s390x.h \
pub/libvex_guest_mips32.h \
pub/libvex_guest_mips64.h \
+ pub/libvex_guest_tilegx.h \
pub/libvex_s390x_common.h \
pub/libvex_ir.h \
pub/libvex_trc_values.h
@@ -44,6 +45,7 @@
priv/guest_arm64_defs.h \
priv/guest_s390_defs.h \
priv/guest_mips_defs.h \
+ priv/guest_tilegx_defs.h \
priv/host_generic_regs.h \
priv/host_generic_simd64.h \
priv/host_generic_simd128.h \
@@ -57,7 +59,8 @@
priv/host_s390_defs.h \
priv/s390_disasm.h \
priv/s390_defs.h \
- priv/host_mips_defs.h
+ priv/host_mips_defs.h \
+ priv/tilegx_disasm.h
BUILT_SOURCES = pub/libvex_guest_offsets.h
CLEANFILES = pub/libvex_guest_offsets.h
@@ -82,7 +85,8 @@
pub/libvex_guest_arm64.h \
pub/libvex_guest_s390x.h \
pub/libvex_guest_mips32.h \
- pub/libvex_guest_mips64.h
+ pub/libvex_guest_mips64.h \
+ pub/libvex_guest_tilegx.h
rm -f auxprogs/genoffsets.s
$(mkdir_p) auxprogs pub
$(CC) $(CFLAGS_FOR_GENOFFSETS) \
@@ -137,6 +141,8 @@
priv/guest_s390_toIR.c \
priv/guest_mips_helpers.c \
priv/guest_mips_toIR.c \
+ priv/guest_tilegx_helpers.c \
+ priv/guest_tilegx_toIR.c \
priv/host_generic_regs.c \
priv/host_generic_simd64.c \
priv/host_generic_simd128.c \
@@ -157,7 +163,10 @@
priv/host_s390_isel.c \
priv/s390_disasm.c \
priv/host_mips_defs.c \
- priv/host_mips_isel.c
+ priv/host_mips_isel.c \
+ priv/host_tilegx_defs.c \
+ priv/host_tilegx_isel.c \
+ priv/tilegx_disasm.c
LIBVEXMULTIARCH_SOURCES = priv/multiarch_main_main.c
Modified: trunk/cachegrind/cg_arch.c
==============================================================================
--- trunk/cachegrind/cg_arch.c (original)
+++ trunk/cachegrind/cg_arch.c Fri Apr 10 13:30:09 2015
@@ -477,6 +477,13 @@
*D1c = (cache_t) { 65536, 2, 64 };
*LLc = (cache_t) { 262144, 8, 64 };
+#elif defined(VGA_tilegx)
+
+ // Set caches to default for Tilegx.
+ *I1c = (cache_t) { 0x8000, 2, 64 };
+ *D1c = (cache_t) { 0x8000, 2, 64 };
+ *LLc = (cache_t) { 0x40000, 8, 64 };
+
#else
#error "Unknown arch"
Modified: trunk/cachegrind/cg_branchpred.c
==============================================================================
--- trunk/cachegrind/cg_branchpred.c (original)
+++ trunk/cachegrind/cg_branchpred.c Fri Apr 10 13:30:09 2015
@@ -51,6 +51,8 @@
# define N_IADDR_LO_ZERO_BITS 0
#elif defined(VGA_s390x) || defined(VGA_arm)
# define N_IADDR_LO_ZERO_BITS 1
+#elif defined(VGA_tilegx)
+# define N_IADDR_LO_ZERO_BITS 3
#else
# error "Unsupported architecture"
#endif
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Fri Apr 10 13:30:09 2015
@@ -268,6 +268,12 @@
AC_MSG_RESULT([ok (${host_cpu})])
ARCH_MAX="mips64"
;;
+
+ tilegx)
+ AC_MSG_RESULT([ok (${host_cpu})])
+ ARCH_MAX="tilegx"
+ ;;
+
*)
AC_MSG_RESULT([no (${host_cpu})])
AC_MSG_ERROR([Unsupported host architecture. Sorry])
@@ -690,6 +696,17 @@
valt_load_address_sec_inner="0xUNSET"
AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})])
;;
+ tilegx-linux)
+ VGCONF_ARCH_PRI="tilegx"
+ VGCONF_ARCH_SEC=""
+ VGCONF_PLATFORM_PRI_CAPS="TILEGX_LINUX"
+ VGCONF_PLATFORM_SEC_CAPS=""
+ valt_load_address_pri_norml="0x38000000"
+ valt_load_address_pri_inner="0x28000000"
+ valt_load_address_sec_norml="0xUNSET"
+ valt_load_address_sec_inner="0xUNSET"
+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})])
+ ;;
*)
VGCONF_ARCH_PRI="unknown"
VGCONF_ARCH_SEC="unknown"
@@ -733,6 +750,8 @@
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX )
AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_MIPS64,
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX )
+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_TILEGX,
+ test x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX )
# Set up VGCONF_PLATFORMS_INCLUDE_<platform>. Either one or two of these
# become defined.
@@ -760,6 +779,8 @@
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX)
AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX,
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX)
+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_TILEGX_LINUX,
+ test x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX)
AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_DARWIN,
test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \
-o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN)
@@ -780,7 +801,8 @@
-o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \
-o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \
-o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \
- -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX)
+ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \
+ -o x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX)
AM_CONDITIONAL(VGCONF_OS_IS_DARWIN,
test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \
-o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN)
@@ -3008,6 +3030,7 @@
none/tests/s390x/Makefile
none/tests/mips32/Makefile
none/tests/mips64/Makefile
+ none/tests/tilegx/Makefile
none/tests/linux/Makefile
none/tests/darwin/Makefile
none/tests/x86-linux/Makefile
Modified: trunk/coregrind/Makefile.am
==============================================================================
--- trunk/coregrind/Makefile.am (original)
+++ trunk/coregrind/Makefile.am Fri Apr 10 13:30:09 2015
@@ -343,6 +343,7 @@
m_dispatch/dispatch-s390x-linux.S \
m_dispatch/dispatch-mips32-linux.S \
m_dispatch/dispatch-mips64-linux.S \
+ m_dispatch/dispatch-tilegx-linux.S \
m_dispatch/dispatch-x86-darwin.S \
m_dispatch/dispatch-amd64-darwin.S \
m_gdbserver/inferiors.c \
@@ -362,6 +363,7 @@
m_gdbserver/valgrind-low-s390x.c \
m_gdbserver/valgrind-low-mips32.c \
m_gdbserver/valgrind-low-mips64.c \
+ m_gdbserver/valgrind-low-tilegx.c \
m_gdbserver/version.c \
m_initimg/initimg-linux.c \
m_initimg/initimg-darwin.c \
@@ -384,6 +386,7 @@
m_sigframe/sigframe-s390x-linux.c \
m_sigframe/sigframe-mips32-linux.c \
m_sigframe/sigframe-mips64-linux.c \
+ m_sigframe/sigframe-tilegx-linux.c \
m_sigframe/sigframe-x86-darwin.c \
m_sigframe/sigframe-amd64-darwin.c \
m_syswrap/syscall-x86-linux.S \
@@ -396,6 +399,7 @@
m_syswrap/syscall-s390x-linux.S \
m_syswrap/syscall-mips32-linux.S \
m_syswrap/syscall-mips64-linux.S \
+ m_syswrap/syscall-tilegx-linux.S \
m_syswrap/syscall-x86-darwin.S \
m_syswrap/syscall-amd64-darwin.S \
m_syswrap/syswrap-main.c \
@@ -412,6 +416,7 @@
m_syswrap/syswrap-s390x-linux.c \
m_syswrap/syswrap-mips32-linux.c \
m_syswrap/syswrap-mips64-linux.c \
+ m_syswrap/syswrap-tilegx-linux.c \
m_syswrap/syswrap-x86-darwin.c \
m_syswrap/syswrap-amd64-darwin.c \
m_syswrap/syswrap-xen.c \
Modified: trunk/coregrind/launcher-linux.c
==============================================================================
--- trunk/coregrind/launcher-linux.c (original)
+++ trunk/coregrind/launcher-linux.c Fri Apr 10 13:30:09 2015
@@ -65,6 +65,10 @@
#define EM_PPC64 21 // ditto
#endif
+#ifndef EM_TILEGX
+#define EM_TILEGX 191
+#endif
+
/* Report fatal errors */
__attribute__((noreturn))
static void barf ( const char *format, ... )
@@ -243,6 +247,10 @@
(ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
platform = "mips64-linux";
+ } else if (ehdr->e_machine == EM_TILEGX &&
+ (ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
+ ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
+ platform = "tilegx-linux";
} else if (ehdr->e_machine == EM_AARCH64 &&
(ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
@@ -349,6 +357,7 @@
(0==strcmp(VG_PLATFORM,"arm-linux")) ||
(0==strcmp(VG_PLATFORM,"arm64-linux")) ||
(0==strcmp(VG_PLATFORM,"s390x-linux")) ||
+ (0==strcmp(VG_PLATFORM,"tilegx-linux")) ||
(0==strcmp(VG_PLATFORM,"mips32-linux")) ||
(0==strcmp(VG_PLATFORM,"mips64-linux")))
default_platform = VG_PLATFORM;
Modified: trunk/coregrind/m_aspacemgr/aspacemgr-common.c
==============================================================================
--- trunk/coregrind/m_aspacemgr/aspacemgr-common.c (original)
+++ trunk/coregrind/m_aspacemgr/aspacemgr-common.c Fri Apr 10 13:30:09 2015
@@ -158,7 +158,8 @@
# elif defined(VGP_amd64_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_s390x_linux) || defined(VGP_mips32_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
+ || defined(VGP_tilegx_linux)
res = VG_(do_syscall6)(__NR_mmap, (UWord)start, length,
prot, flags, fd, offset);
# elif defined(VGP_x86_darwin)
@@ -245,6 +246,9 @@
/* ARM64 wants to use __NR_openat rather than __NR_open. */
SysRes res = VG_(do_syscall4)(__NR_openat,
VKI_AT_FDCWD, (UWord)pathname, flags, mode);
+# elif defined(VGP_tilegx_linux)
+ SysRes res = VG_(do_syscall4)(__NR_openat, AT_FDCWD, (UWord)pathname,
+ flags, mode);
# else
SysRes res = VG_(do_syscall3)(__NR_open, (UWord)pathname, flags, mode);
# endif
@@ -268,6 +272,9 @@
# if defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)path, (UWord)buf, bufsiz);
+# elif defined(VGP_tilegx_linux)
+ res = VG_(do_syscall4)(__NR_readlinkat, AT_FDCWD, (UWord)path, (UWord)buf,
+ bufsiz);
# else
res = VG_(do_syscall3)(__NR_readlink, (UWord)path, (UWord)buf, bufsiz);
# endif
Modified: trunk/coregrind/m_cache.c
==============================================================================
--- trunk/coregrind/m_cache.c (original)
+++ trunk/coregrind/m_cache.c Fri Apr 10 13:30:09 2015
@@ -540,8 +540,8 @@
#elif defined(VGA_arm) || defined(VGA_ppc32) || \
defined(VGA_ppc64be) || defined(VGA_ppc64le) || \
- defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64)
-
+ defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64) || \
+ defined(VGA_tilegx)
static Bool
get_cache_info(VexArchInfo *vai)
{
Modified: trunk/coregrind/m_coredump/coredump-elf.c
==============================================================================
--- trunk/coregrind/m_coredump/coredump-elf.c (original)
+++ trunk/coregrind/m_coredump/coredump-elf.c Fri Apr 10 13:30:09 2015
@@ -419,7 +419,17 @@
# undef DO
regs->MIPS_hi = arch->vex.guest_HI;
regs->MIPS_lo = arch->vex.guest_LO;
-
+#elif defined(VGP_tilegx_linux)
+# define DO(n) regs->regs[n] = arch->vex.guest_r##n
+ DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7);
+ DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15);
+ DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23);
+ DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
+ DO(32); DO(33); DO(34); DO(35); DO(36); DO(37); DO(38); DO(39);
+ DO(40); DO(41); DO(42); DO(43); DO(44); DO(45); DO(46); DO(47);
+ DO(48); DO(49); DO(50); DO(51); DO(52); DO(53); DO(54); DO(55);
+ regs->pc = arch->vex.guest_pc;
+ regs->orig_r0 = arch->vex.guest_r0;
#else
# error Unknown ELF platform
#endif
@@ -492,7 +502,7 @@
DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
# undef DO
-#elif defined(VGP_arm_linux)
+#elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux)
// umm ...
#elif defined(VGP_arm64_linux)
Modified: trunk/coregrind/m_debugger.c
==============================================================================
--- trunk/coregrind/m_debugger.c (original)
+++ trunk/coregrind/m_debugger.c Fri Apr 10 13:30:09 2015
@@ -386,6 +386,69 @@
regs.MIPS_r31 = vex->guest_r31;
return VG_(ptrace)(VKI_PTRACE_SETREGS, pid, NULL, ®s);
+#elif defined(VGP_tilegx_linux)
+ struct vki_user_regs_struct regs;
+ VG_(memset)(®s, 0, sizeof(regs));
+ regs.TILEGX_r0 = vex->guest_r0;
+ regs.TILEGX_r1 = vex->guest_r1;
+ regs.TILEGX_r2 = vex->guest_r2;
+ regs.TILEGX_r3 = vex->guest_r3;
+ regs.TILEGX_r4 = vex->guest_r4;
+ regs.TILEGX_r5 = vex->guest_r5;
+ regs.TILEGX_r6 = vex->guest_r6;
+ regs.TILEGX_r7 = vex->guest_r7;
+ regs.TILEGX_r8 = vex->guest_r8;
+ regs.TILEGX_r9 = vex->guest_r9;
+ regs.TILEGX_r10 = vex->guest_r10;
+ regs.TILEGX_r11 = vex->guest_r11;
+ regs.TILEGX_r12 = vex->guest_r12;
+ regs.TILEGX_r13 = vex->guest_r13;
+ regs.TILEGX_r14 = vex->guest_r14;
+ regs.TILEGX_r15 = vex->guest_r15;
+ regs.TILEGX_r16 = vex->guest_r16;
+ regs.TILEGX_r17 = vex->guest_r17;
+ regs.TILEGX_r18 = vex->guest_r18;
+ regs.TILEGX_r19 = vex->guest_r19;
+ regs.TILEGX_r20 = vex->guest_r20;
+ regs.TILEGX_r21 = vex->guest_r21;
+ regs.TILEGX_r22 = vex->guest_r22;
+ regs.TILEGX_r23 = vex->guest_r23;
+ regs.TILEGX_r24 = vex->guest_r24;
+ regs.TILEGX_r25 = vex->guest_r25;
+ regs.TILEGX_r26 = vex->guest_r26;
+ regs.TILEGX_r27 = vex->guest_r27;
+ regs.TILEGX_r28 = vex->guest_r28;
+ regs.TILEGX_r29 = vex->guest_r29;
+ regs.TILEGX_r30 = vex->guest_r30;
+ regs.TILEGX_r31 = vex->guest_r31;
+ regs.TILEGX_r32 = vex->guest_r32;
+ regs.TILEGX_r33 = vex->guest_r33;
+ regs.TILEGX_r34 = vex->guest_r34;
+ regs.TILEGX_r35 = vex->guest_r35;
+ regs.TILEGX_r36 = vex->guest_r36;
+ regs.TILEGX_r37 = vex->guest_r37;
+ regs.TILEGX_r38 = vex->guest_r38;
+ regs.TILEGX_r39 = vex->guest_r39;
+ regs.TILEGX_r40 = vex->guest_r40;
+ regs.TILEGX_r41 = vex->guest_r41;
+ regs.TILEGX_r42 = vex->guest_r42;
+ regs.TILEGX_r43 = vex->guest_r43;
+ regs.TILEGX_r44 = vex->guest_r44;
+ regs.TILEGX_r45 = vex->guest_r45;
+ regs.TILEGX_r46 = vex->guest_r46;
+ regs.TILEGX_r47 = vex->guest_r47;
+ regs.TILEGX_r48 = vex->guest_r48;
+ regs.TILEGX_r49 = vex->guest_r49;
+ regs.TILEGX_r50 = vex->guest_r50;
+ regs.TILEGX_r51 = vex->guest_r51;
+ regs.TILEGX_r52 = vex->guest_r52;
+ regs.TILEGX_r53 = vex->guest_r53;
+ regs.TILEGX_r54 = vex->guest_r54;
+ regs.TILEGX_r55 = vex->guest_r55;
+ regs.TILEGX_pc = vex->guest_pc;
+
+ return VG_(ptrace)(VKI_PTRACE_SETREGS, pid, NULL, ®s);
+
#else
# error Unknown arch
#endif
Modified: trunk/coregrind/m_debuginfo/d3basics.c
==============================================================================
--- trunk/coregrind/m_debuginfo/d3basics.c (original)
+++ trunk/coregrind/m_debuginfo/d3basics.c Fri Apr 10 13:30:09 2015
@@ -424,6 +424,9 @@
if (regno == 30) { *a = regs->fp; return True; }
# elif defined(VGP_arm64_linux)
if (regno == 31) { *a = regs->sp; return True; }
+# elif defined(VGP_tilegx_linux)
+ if (regno == 52) { *a = regs->fp; return True; }
+ if (regno == 54) { *a = regs->sp; return True; }
# else
# error "Unknown platform"
# endif
Modified: trunk/coregrind/m_debuginfo/debuginfo.c
==============================================================================
--- trunk/coregrind/m_debuginfo/debuginfo.c (original)
+++ trunk/coregrind/m_debuginfo/debuginfo.c Fri Apr 10 13:30:09 2015
@@ -955,6 +955,9 @@
# elif defined(VGP_s390x_linux)
is_rx_map = seg->hasR && seg->hasX && !seg->hasW;
is_rw_map = seg->hasR && seg->hasW;
+# elif defined(VGA_tilegx)
+ is_rx_map = seg->hasR && seg->hasX; // && !seg->hasW;
+ is_rw_map = seg->hasR && seg->hasW; // && !seg->hasX;
# else
# error "Unknown platform"
# endif
@@ -2488,6 +2491,11 @@
|| defined(VGA_ppc64le)
# elif defined(VGP_arm64_linux)
case Creg_ARM64_X30: return eec->uregs->x30;
+# elif defined(VGA_tilegx)
+ case Creg_TILEGX_IP: return eec->uregs->pc;
+ case Creg_TILEGX_SP: return eec->uregs->sp;
+ case Creg_TILEGX_BP: return eec->uregs->fp;
+ case Creg_TILEGX_LR: return eec->uregs->lr;
# else
# error "Unsupported arch"
# endif
@@ -2743,6 +2751,16 @@
case CFIC_ARM64_X29REL:
cfa = cfsi_m->cfa_off + uregs->x29;
break;
+# elif defined(VGA_tilegx)
+ case CFIC_IA_SPREL:
+ cfa = cfsi_m->cfa_off + uregs->sp;
+ break;
+ case CFIR_SAME:
+ cfa = uregs->fp;
+ break;
+ case CFIC_IA_BPREL:
+ cfa = cfsi_m->cfa_off + uregs->fp;
+ break;
# else
# error "Unsupported arch"
# endif
@@ -2797,7 +2815,7 @@
return compute_cfa(&uregs,
min_accessible, max_accessible, ce->di, ce->cfsi_m);
}
-#elif defined(VGA_mips32) || defined(VGA_mips64)
+#elif defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_tilegx)
{ D3UnwindRegs uregs;
uregs.pc = ip;
uregs.sp = sp;
@@ -2846,6 +2864,8 @@
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
# elif defined(VGP_arm64_linux)
ipHere = uregsHere->pc;
+# elif defined(VGA_tilegx)
+ ipHere = uregsHere->pc;
# else
# error "Unknown arch"
# endif
@@ -2931,6 +2951,10 @@
COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off);
COMPUTE(uregsPrev.x30, uregsHere->x30, cfsi_m->x30_how, cfsi_m->x30_off);
COMPUTE(uregsPrev.x29, uregsHere->x29, cfsi_m->x29_how, cfsi_m->x29_off);
+# elif defined(VGA_tilegx)
+ COMPUTE(uregsPrev.pc, uregsHere->pc, cfsi_m->ra_how, cfsi_m->ra_off);
+ COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off);
+ COMPUTE(uregsPrev.fp, uregsHere->fp, cfsi_m->fp_how, cfsi_m->fp_off);
# else
# error "Unknown arch"
# endif
Modified: trunk/coregrind/m_debuginfo/priv_storage.h
==============================================================================
--- trunk/coregrind/m_debuginfo/priv_storage.h (original)
+++ trunk/coregrind/m_debuginfo/priv_storage.h Fri Apr 10 13:30:09 2015
@@ -333,6 +333,19 @@
Int fp_off;
}
DiCfSI_m;
+#elif defined(VGA_tilegx)
+typedef
+ struct {
+ UChar cfa_how; /* a CFIC_IA value */
+ UChar ra_how; /* a CFIR_ value */
+ UChar sp_how; /* a CFIR_ value */
+ UChar fp_how; /* a CFIR_ value */
+ Int cfa_off;
+ Int ra_off;
+ Int sp_off;
+ Int fp_off;
+ }
+ DiCfSI_m;
#else
# error "Unknown arch"
#endif
@@ -386,7 +399,11 @@
Creg_S390_SP,
Creg_S390_FP,
Creg_S390_LR,
- Creg_MIPS_RA
+ Creg_MIPS_RA,
+ Creg_TILEGX_IP,
+ Creg_TILEGX_SP,
+ Creg_TILEGX_BP,
+ Creg_TILEGX_LR
}
CfiReg;
Modified: trunk/coregrind/m_debuginfo/readdwarf.c
==============================================================================
--- trunk/coregrind/m_debuginfo/readdwarf.c (original)
+++ trunk/coregrind/m_debuginfo/readdwarf.c Fri Apr 10 13:30:09 2015
@@ -1763,6 +1763,10 @@
# define FP_REG 30
# define SP_REG 29
# define RA_REG_DEFAULT 31
+#elif defined(VGP_tilegx_linux)
+# define FP_REG 52
+# define SP_REG 54
+# define RA_REG_DEFAULT 55
#else
# error "Unknown platform"
#endif
@@ -1775,7 +1779,7 @@
|| defined(VGP_ppc64le_linux) || defined(VGP_mips32_linux) \
|| defined(VGP_mips64_linux)
# define N_CFI_REGS 72
-#elif defined(VGP_arm_linux)
+#elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux)
# define N_CFI_REGS 320
#elif defined(VGP_arm64_linux)
# define N_CFI_REGS 128
@@ -2083,7 +2087,8 @@
if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) {
si_m->cfa_off = ctxs->cfa_off;
# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
- || defined(VGA_mips32) || defined(VGA_mips64)
+ || defined(VGA_mips32) || defined(VGA_mips64) \
+ || defined(VGA_tilegx)
si_m->cfa_how = CFIC_IA_SPREL;
# elif defined(VGA_arm)
si_m->cfa_how = CFIC_ARM_R13REL;
@@ -2097,7 +2102,8 @@
if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) {
si_m->cfa_off = ctxs->cfa_off;
# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
- || defined(VGA_mips32) || defined(VGA_mips64)
+ || defined(VGA_mips32) || defined(VGA_mips64) \
+ || defined(VGA_tilegx)
si_m->cfa_how = CFIC_IA_BPREL;
# elif defined(VGA_arm)
si_m->cfa_how = CFIC_ARM_R12REL;
@@ -2345,9 +2351,9 @@
return True;
# elif defined(VGA_mips32) || defined(VGA_mips64)
-
+
/* --- entire tail of this fn specialised for mips --- */
-
+
SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
ctxs->reg[ctx->ra_reg] );
SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
@@ -2386,7 +2392,48 @@
*len = (UInt)(ctx->loc - loc_start);
return True;
+# elif defined(VGA_tilegx)
+
+ /* --- entire tail of this fn specialised for tilegx --- */
+
+ SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
+ ctxs->reg[ctx->ra_reg] );
+ SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
+ ctxs->reg[FP_REG] );
+ SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
+ ctxs->reg[SP_REG] );
+ si_m->sp_how = CFIR_CFAREL;
+ si_m->sp_off = 0;
+ if (si_m->fp_how == CFIR_UNKNOWN)
+ si_m->fp_how = CFIR_SAME;
+ if (si_m->cfa_how == CFIR_UNKNOWN) {
+ si_m->cfa_how = CFIC_IA_SPREL;
+ si_m->cfa_off = 160;
+ }
+ if (si_m->ra_how == CFIR_UNKNOWN) {
+ if (!debuginfo->cfsi_exprs)
+ debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
+ "di.ccCt.2a",
+ ML_(dinfo_free),
+ sizeof(CfiExpr) );
+ si_m->ra_how = CFIR_EXPR;
+ si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
+ Creg_TILEGX_LR);
+ }
+
+ if (si_m->ra_how == CFIR_SAME)
+ { why = 3; goto failed; }
+
+ if (loc_start >= ctx->loc)
+ { why = 4; goto failed; }
+ if (ctx->loc - loc_start > 10000000 /* let's say */)
+ { why = 5; goto failed; }
+
+ *base = loc_start + ctx->initloc;
+ *len = (UInt)(ctx->loc - loc_start);
+
+ return True;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
/* These don't use CFI based unwinding (is that really true?) */
@@ -2483,6 +2530,13 @@
I_die_here;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) \
|| defined(VGA_ppc64le)
+# elif defined(VGA_tilegx)
+ if (dwreg == SP_REG)
+ return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_SP );
+ if (dwreg == FP_REG)
+ return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_BP );
+ if (dwreg == srcuc->ra_reg)
+ return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_IP );
# else
# error "Unknown arch"
# endif
Modified: trunk/coregrind/m_debuginfo/readelf.c
==============================================================================
--- trunk/coregrind/m_debuginfo/readelf.c (original)
+++ trunk/coregrind/m_debuginfo/readelf.c Fri Apr 10 13:30:09 2015
@@ -2161,7 +2161,7 @@
# if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \
|| defined(VGP_arm_linux) || defined (VGP_s390x_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux)
+ || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
/* Accept .plt where mapped as rx (code) */
if (0 == VG_(strcmp)(name, ".plt")) {
if (inrx && !di->plt_present) {
Modified: trunk/coregrind/m_debuginfo/storage.c
==============================================================================
--- trunk/coregrind/m_debuginfo/storage.c (original)
+++ trunk/coregrind/m_debuginfo/storage.c Fri Apr 10 13:30:09 2015
@@ -212,6 +212,11 @@
SHOW_HOW(si_m->x30_how, si_m->x30_off);
VG_(printf)(" X29=");
SHOW_HOW(si_m->x29_how, si_m->x29_off);
+# elif defined(VGA_tilegx)
+ VG_(printf)(" SP=");
+ SHOW_HOW(si_m->sp_how, si_m->sp_off);
+ VG_(printf)(" FP=");
+ SHOW_HOW(si_m->fp_how, si_m->fp_off);
# else
# error "Unknown arch"
# endif
@@ -920,6 +925,10 @@
case Creg_S390_SP: VG_(printf)("SP"); break;
case Creg_S390_FP: VG_(printf)("FP"); break;
case Creg_S390_LR: VG_(printf)("LR"); break;
+ case Creg_TILEGX_IP: VG_(printf)("PC"); break;
+ case Creg_TILEGX_SP: VG_(printf)("SP"); break;
+ case Creg_TILEGX_BP: VG_(printf)("BP"); break;
+ case Creg_TILEGX_LR: VG_(printf)("R55"); break;
default: vg_assert(0);
}
}
Modified: trunk/coregrind/m_debuglog.c
==============================================================================
--- trunk/coregrind/m_debuglog.c (original)
+++ trunk/coregrind/m_debuglog.c Fri Apr 10 13:30:09 2015
@@ -508,6 +508,51 @@
: "$2" );
return (UInt)(__res);
}
+#elif defined(VGP_tilegx_linux)
+static UInt local_sys_write_stderr ( const HChar* buf, Int n )
+{
+ volatile Long block[2];
+ block[0] = (Long)buf;
+ block[1] = n;
+ ULong __res = 0;
+ __asm__ volatile (
+ "movei r0, 2 \n\t" /* stderr */
+ "move r1, %1 \n\t" /* buf */
+ "move r2, %2 \n\t" /* n */
+ "move r3, zero \n\t"
+ "moveli r10, %3 \n\t" /* set r10 = __NR_write */
+ "swint1 \n\t" /* write() */
+ "nop \n\t"
+ "move %0, r0 \n\t" /* save return into block[0] */
+ : "=r"(__res)
+ : "r" (block[0]), "r"(block[1]), "n" (__NR_write)
+ : "r0", "r1", "r2", "r3", "r4", "r5");
+ if (__res < 0)
+ __res = -1;
+ return (UInt)__res;
+}
+
+static UInt local_sys_getpid ( void )
+{
+ UInt __res, __err;
+ __res = 0;
+ __err = 0;
+ __asm__ volatile (
+ "moveli r10, %2\n\t" /* set r10 = __NR_getpid */
+ "swint1\n\t" /* getpid() */
+ "nop\n\t"
+ "move %0, r0\n"
+ "move %1, r1\n"
+ : "=r" (__res), "=r"(__err)
+ : "n" (__NR_getpid)
+ : "r0", "r1", "r2", "r3", "r4",
+ "r5", "r6", "r7", "r8", "r9",
+ "r10", "r11", "r12", "r13", "r14",
+ "r15", "r16", "r17", "r18", "r19",
+ "r20", "r21", "r22", "r23", "r24",
+ "r25", "r26", "r27", "r28", "r29");
+ return __res;
+}
#else
# error Unknown platform
Added: trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S
==============================================================================
--- trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S (added)
+++ trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S Fri Apr 10 13:30:09 2015
@@ -0,0 +1,308 @@
+
+/*--------------------------------------------------------------------*/
+/*--- begin dispatch-tilegx-linux.S ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2010-2013 Tilera Corp.
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
+
+#if defined(VGP_tilegx_linux)
+#include "pub_core_basics_asm.h"
+#include "pub_core_dispatch_asm.h"
+#include "pub_core_transtab_asm.h"
+#include "libvex_guest_offsets.h" /* for OFFSET_tilegx_PC */
+
+ /*------------------------------------------------------------*/
+ /*--- ---*/
+ /*--- The dispatch loop. VG_(run_innerloop) is used to ---*/
+ /*--- run all translations except no-redir ones. ---*/
+ /*--- ---*/
+ /*------------------------------------------------------------*/
+
+ /*----------------------------------------------------*/
+ /*--- Preamble (set everything up) ---*/
+ /*----------------------------------------------------*/
+
+ /* signature:
+ void VG_(disp_run_translations)(UWord* two_words,
+ void* guest_state,
+ Addr host_addr );
+ UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling );
+ */
+
+ .text
+ .globl VG_(disp_run_translations)
+ VG_(disp_run_translations):
+
+ /* r0 holds two_words
+ r1 holds guest_state
+ r2 holds host_addr */
+
+ /* New stack frame */
+ addli sp, sp, -256
+ addi r29, sp, 8
+ /*
+ high memory of stack
+ 216 lr
+ 208 r53
+ 200 r52
+ 192 r51
+ ...
+ 48 r33
+ 40 r32
+ 32 r31
+ 24 r30
+ 16 r1 <---
+ 8 r0
+ 0 <-sp
+ */
+ st_add r29, r0, 8
+ st_add r29, r1, 8
+
+ /* ... and r30 - r53 */
+ st_add r29, r30, 8
+ st_add r29, r31, 8
+ st_add r29, r32, 8
+ st_add r29, r33, 8
+ st_add r29, r34, 8
+ st_add r29, r35, 8
+ st_add r29, r36, 8
+ st_add r29, r37, 8
+ st_add r29, r38, 8
+ st_add r29, r39, 8
+ st_add r29, r40, 8
+ st_add r29, r41, 8
+ st_add r29, r42, 8
+ st_add r29, r43, 8
+ st_add r29, r44, 8
+ st_add r29, r45, 8
+ st_add r29, r46, 8
+ st_add r29, r47, 8
+ st_add r29, r48, 8
+ st_add r29, r49, 8
+ st_add r29, r50, 8
+ st_add r29, r51, 8
+ st_add r29, r52, 8
+ st_add r29, r53, 8
+ st r29, lr
+
+ /* Load the address of guest state into guest state register r50. */
+ move r50, r1
+
+ //j postamble
+
+ /* jump to the code cache. */
+ jr r2
+ /*NOTREACHED*/
+
+
+ /*----------------------------------------------------*/
+ /*--- Postamble and exit. ---*/
+ /*----------------------------------------------------*/
+
+postamble:
+ /* At this point, r12 and r13 contain two
+ words to be returned to the caller. r12
+ holds a TRC value, and r13 optionally may
+ hold another word (for CHAIN_ME exits, the
+ address of the place to patch.) */
+
+ /* run_innerloop_exit_REALLY:
+ r50 holds VG_TRC_* value to return
+ Return to parent stack
+ addli sp, sp, 256 */
+
+ addi r29, sp, 8
+
+ /* Restore r0 from stack; holding address of twp words */
+ ld_add r0, r29, 16
+ /* store r12 in two_words[0] */
+ st_add r0, r12, 8
+ /* store r13 in two_words[1] */
+ st r0, r13
+
+ /* Restore callee-saved registers... */
+ ld_add r30, r29, 8
+ ld_add r31, r29, 8
+ ld_add r32, r29, 8
+ ld_add r33, r29, 8
+ ld_add r34, r29, 8
+ ld_add r35, r29, 8
+ ld_add r36, r29, 8
+ ld_add r37, r29, 8
+ ld_add r38, r29, 8
+ ld_add r39, r29, 8
+ ld_add r40, r29, 8
+ ld_add r41, r29, 8
+ ld_add r42, r29, 8
+ ld_add r43, r29, 8
+ ld_add r44, r29, 8
+ ld_add r45, r29, 8
+ ld_add r46, r29, 8
+ ld_add r47, r29, 8
+ ld_add r48, r29, 8
+ ld_add r49, r29, 8
+ ld_add r50, r29, 8
+ ld_add r51, r29, 8
+ ld_add r52, r29, 8
+ ld_add r53, r29, 8
+ ld lr, r29
+ addli sp, sp, 256 /* stack_size */
+ jr lr
+ nop
+
+
+ /*----------------------------------------------------*/
+ /*--- Continuation points ---*/
+ /*----------------------------------------------------*/
+
+ /* ------ Chain me to slow entry point ------ */
+ .global VG_(disp_cp_chain_me_to_slowEP)
+ VG_(disp_cp_chain_me_to_slowEP):
+ /* We got called. The return address indicates
+ where the patching needs to happen. Collect
+ the return address and, exit back to C land,
+ handing the caller the pair (Chain_me_S, RA) */
+ # if (VG_TRC_CHAIN_ME_TO_SLOW_EP > 128)
+ # error ("VG_TRC_CHAIN_ME_TO_SLOW_EP is > 128");
+ # endif
+ moveli r12, VG_TRC_CHAIN_ME_TO_SLOW_EP
+ move r13, lr
+ /* 32 = mkLoadImm_EXACTLY4
+ 8 = jalr r9
+ 8 = nop */
+ addi r13, r13, -40
+ j postamble
+
+ /* ------ Chain me to slow entry point ------ */
+ .global VG_(disp_cp_chain_me_to_fastEP)
+ VG_(disp_cp_chain_me_to_fastEP):
+ /* We got called. The return address indicates
+ where the patching needs to happen. Collect
+ the return address and, exit back to C land,
+ handing the caller the pair (Chain_me_S, RA) */
+ # if (VG_TRC_CHAIN_ME_TO_FAST_EP > 128)
+ # error ("VG_TRC_CHAIN_ME_TO_FAST_EP is > 128");
+ # endif
+ moveli r12, VG_TRC_CHAIN_ME_TO_FAST_EP
+ move r13, lr
+ /* 32 = mkLoadImm_EXACTLY4
+ 8 = jalr r9
+ 8 = nop */
+ addi r13, r13, -40
+ j postamble
+
+ /* ------ Indirect but boring jump ------ */
+ .global VG_(disp_cp_xindir)
+ VG_(disp_cp_xindir):
+ /* Where are we going? */
+ addli r11, r50, OFFSET_tilegx_pc
+ ld r11, r11
+
+ moveli r7, hw2_last(VG_(stats__n_xindirs_32))
+ shl16insli r7, r7, hw1(VG_(stats__n_xindirs_32))
+ shl16insli r7, r7, hw0(VG_(stats__n_xindirs_32))
+ ld4u r6, r7
+ addi r6, r6, 1
+ st4 r7, r6
+
+ /* try a fast lookup in the translation cache */
+ /* r14 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
+ = (t8 >> 3 & VG_TT_FAST_MASK) << 3 */
+
+ move r14, r11
+ /* Assume VG_TT_FAST_MASK < 4G */
+ moveli r12, hw1(VG_TT_FAST_MASK)
+ shl16insli r12, r12, hw0(VG_TT_FAST_MASK)
+ shrui r14, r14, 3
+ and r14, r14, r12
+ shli r14, r14, 4
+ /* Note, each tt_fast hash entry has two pointers i.e. 16 Bytes. */
+
+ /* r13 = (addr of VG_(tt_fast)) + r14 */
+ moveli r13, hw2_last(VG_(tt_fast))
+ shl16insli r13, r13, hw1(VG_(tt_fast))
+ shl16insli r13, r13, hw0(VG_(tt_fast))
+
+ add r13, r13, r14
+
+ /* r12 = VG_(tt_fast)[hash] :: ULong* */
+ ld_add r12, r13, 8
+
+ {
+ ld r25, r13
+ sub r7, r12, r11
+ }
+
+ bnez r7, fast_lookup_failed
+
+ /* Run the translation */
+ jr r25
+
+ .quad 0x0
+
+fast_lookup_failed:
+ /* %PC is up to date */
+ /* back out decrement of the dispatch counter */
+ /* hold dispatch_ctr in t0 (r8) */
+
+ moveli r7, hw2_last(VG_(stats__n_xindir_misses_32))
+ shl16insli r7, r7, hw1(VG_(stats__n_xindir_misses_32))
+ shl16insli r7, r7, hw0(VG_(stats__n_xindir_misses_32))
+ ld4u r6, r7
+ addi r6, r6, 1
+ st4 r7, r6
+ moveli r12, VG_TRC_INNER_FASTMISS
+ movei r13, 0
+ j postamble
+
+ /* ------ Assisted jump ------ */
+ .global VG_(disp_cp_xassisted)
+ VG_(disp_cp_xassisted):
+ /* guest-state-pointer contains the TRC. Put the value into the
+ return register */
+ move r12, r50
+ movei r13, 0
+ j postamble
+
+ /* ------ Event check failed ------ */
+ .global VG_(disp_cp_evcheck_fail)
+ VG_(disp_cp_evcheck_fail):
+ moveli r12, VG_TRC_INNER_COUNTERZERO
+ movei r13, 0
+ j postamble
+
+ .size VG_(disp_run_translations), .-VG_(disp_run_translations)
+
+
+ /* Let the linker know we do not need an executable stack */
+ .section .note.GNU-stack,"",@progbits
+
+#endif /* defined(VGP_tilegx_linux) */
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
+
Modified: trunk/coregrind/m_gdbserver/target.c
==============================================================================
--- trunk/coregrind/m_gdbserver/target.c (original)
+++ trunk/coregrind/m_gdbserver/target.c Fri Apr 10 13:30:09 2015
@@ -804,6 +804,8 @@
mips32_init_architecture(&the_low_target);
#elif defined(VGA_mips64)
mips64_init_architecture(&the_low_target);
+#elif defined(VGA_tilegx)
+ tilegx_init_architecture(&the_low_target);
#else
#error "architecture missing in target.c valgrind_initialize_target"
#endif
Added: trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c (added)
+++ trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c Fri Apr 10 13:30:09 2015
@@ -0,0 +1,260 @@
+/* Low level interface to valgrind, for the remote server for GDB integrated
+ in valgrind.
+ Copyright (C) 2012
+ Free Software Foundation, Inc.
+
+ This file is part of VALGRIND.
+ It has been inspired from a file from gdbserver in gdb 6.6.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+#include "server.h"
+#include "target.h"
+#include "regdef.h"
+#include "regcache.h"
+
+#include "pub_core_aspacemgr.h"
+#include "pub_core_threadstate.h"
+#include "pub_core_transtab.h"
+#include "pub_core_gdbserver.h"
+
+#include "valgrind_low.h"
+
+#include "libvex_guest_tilegx.h"
+#define REG_ONE(_n) { "r"#_n, 64 * (_n), 64 }
+#define REG_ONE_NAME(_n, _name) { _name, 64 * (_n), 64 }
+
+static struct reg regs[] = {
+ REG_ONE(0),
+ REG_ONE(1),
+ REG_ONE(2),
+ REG_ONE(3),
+ REG_ONE(4),
+ REG_ONE(5),
+ REG_ONE(6),
+ REG_ONE(7),
+ REG_ONE(8),
+ REG_ONE(9),
+
+ REG_ONE(10),
+ REG_ONE(11),
+ REG_ONE(12),
+ REG_ONE(13),
+ REG_ONE(14),
+ REG_ONE(15),
+ REG_ONE(16),
+ REG_ONE(17),
+ REG_ONE(18),
+ REG_ONE(19),
+
+ REG_ONE(20),
+ REG_ONE(21),
+ REG_ONE(22),
+ REG_ONE(23),
+ REG_ONE(24),
+ REG_ONE(25),
+ REG_ONE(26),
+ REG_ONE(27),
+ REG_ONE(28),
+ REG_ONE(29),
+
+ REG_ONE(30),
+ REG_ONE(31),
+ REG_ONE(32),
+ REG_ONE(33),
+ REG_ONE(34),
+ REG_ONE(35),
+ REG_ONE(36),
+ REG_ONE(37),
+ REG_ONE(38),
+ REG_ONE(39),
+
+ REG_ONE(40),
+ REG_ONE(41),
+ REG_ONE(42),
+ REG_ONE(43),
+ REG_ONE(44),
+ REG_ONE(45),
+ REG_ONE(46),
+ REG_ONE(47),
+ REG_ONE(48),
+ REG_ONE(49),
+
+ REG_ONE(50),
+ REG_ONE(51),
+ REG_ONE(52),
+ REG_ONE(53),
+
+ REG_ONE_NAME(54, "sp"),
+ REG_ONE_NAME(55, "lr"),
+ REG_ONE(56),
+ REG_ONE(57),
+ REG_ONE(58),
+ REG_ONE(59),
+
+ REG_ONE(60),
+ REG_ONE(61),
+ REG_ONE(62),
+ REG_ONE_NAME(63, "zero"),
+ REG_ONE_NAME(64, "pc"),
+};
+
+#define num_regs (sizeof (regs) / sizeof (regs[0]))
+
+static const char *expedite_regs[] = { "sp", "pc", 0 };
+
+static
+CORE_ADDR get_pc (void)
+{
+ unsigned long pc;
+
+ collect_register_by_name ("pc", &pc);
+
+ dlog(1, "stop pc is %p\n", (void *) pc);
+ return pc;
+}
+
+static
+void set_pc ( CORE_ADDR newpc )
+{
+ Bool mod;
+ supply_register_by_name ("pc", &newpc, &mod);
+ if (mod)
+ dlog(1, "set pc to %p\n", C2v (newpc));
+ else
+ dlog(1, "set pc not changed %p\n", C2v (newpc));
+}
+
+/* store registers in the guest state (gdbserver_to_valgrind)
+ or fetch register from the guest state (valgrind_to_gdbserver). */
+static
+void transfer_register ( ThreadId tid, int abs_regno, void * buf,
+ transfer_direction dir, int size, Bool *mod )
+{
+ ThreadState* tst = VG_(get_ThreadState)(tid);
+ int set = abs_regno / num_regs;
+ int regno = abs_regno % num_regs;
+ *mod = False;
+
+ VexGuestTILEGXState* tilegx = (VexGuestTILEGXState*) get_arch (set, tst);
+
+ switch (regno) {
+ case 0: VG_(transfer) (&tilegx->guest_r0, buf, dir, size, mod); break;
+ case 1: VG_(transfer) (&tilegx->guest_r1, buf, dir, size, mod); break;
+ case 2: VG_(transfer) (&tilegx->guest_r2, buf, dir, size, mod); break;
+ case 3: VG_(transfer) (&tilegx->guest_r3, buf, dir, size, mod); break;
+ case 4: VG_(transfer) (&tilegx->guest_r4, buf, dir, size, mod); break;
+ case 5: VG_(transfer) (&tilegx->guest_r5, buf, dir, size, mod); break;
+ case 6: VG_(transfer) (&tilegx->guest_r6, buf, dir, size, mod); break;
+ case 7: VG_(transfer) (&tilegx->guest_r7, buf, dir, size, mod); break;
+ case 8: VG_(transfer) (&tilegx->guest_r8, buf, dir, size, mod); break;
+ case 9: VG_(transfer) (&tilegx->guest_r9, buf, dir, size, mod); break;
+ case 10: VG_(transfer) (&tilegx->guest_r10, buf, dir, size, mod); break;
+ case 11: VG_(transfer) (&tilegx->guest_r11, buf, dir, size, mod); break;
+ case 12: VG_(transfer) (&tilegx->guest_r12, buf, dir, size, mod); break;
+ case 13: VG_(transfer) (&tilegx->guest_r13, buf, dir, size, mod); break;
+ case 14: VG_(transfer) (&tilegx->guest_r14, buf, dir, size, mod); break;
+ case 15: VG_(transfer) (&tilegx->guest_r15, buf, dir, size, mod); break;
+ case 16: VG_(transfer) (&tilegx->guest_r16, buf, dir, size, mod); break;
+ case 17: VG_(transfer) (&tilegx->guest_r17, buf, dir, size, mod); break;
+ case 18: VG_(transfer) (&tilegx->guest_r18, buf, dir, size, mod); break;
+ case 19: VG_(transfer) (&tilegx->guest_r19, buf, dir, size, mod); break;
+ case 20: VG_(transfer) (&tilegx->guest_r20, buf, dir, size, mod); break;
+ case 21: VG_(transfer) (&tilegx->guest_r21, buf, dir, size, mod); break;
+ case 22: VG_(transfer) (&tilegx->guest_r22, buf, dir, size, mod); break;
+ case 23: VG_(transfer) (&tilegx->guest_r23, buf, dir, size, mod); break;
+ case 24: VG_(transfer) (&tilegx->guest_r24, buf, dir, size, mod); break;
+ case 25: VG_(transfer) (&tilegx->guest_r25, buf, dir, size, mod); break;
+ case 26: VG_(transfer) (&tilegx->guest_r26, buf, dir, size, mod); break;
+ case 27: VG_(transfer) (&tilegx->guest_r27, buf, dir, size, mod); break;
+ case 28: VG_(transfer) (&tilegx->guest_r28, buf, dir, size, mod); break;
+ case 29: VG_(transfer) (&tilegx->guest_r29, buf, dir, size, mod); break;
+ case 30: VG_(transfer) (&tilegx->guest_r30, buf, dir, size, mod); break;
+ case 31: VG_(transfer) (&tilegx->guest_r31, buf, dir, size, mod); break;
+ case 32: VG_(transfer) (&tilegx->guest_r32, buf, dir, size, mod); break;
+ case 33: VG_(transfer) (&tilegx->guest_r33, buf, dir, size, mod); break;
+ case 34: VG_(transfer) (&tilegx->guest_r34, buf, dir, size, mod); break;
+ case 35: VG_(transfer) (&tilegx->guest_r35, buf, dir, size, mod); break;
+ case 36: VG_(transfer) (&tilegx->guest_r36, buf, dir, size, mod); break;
+ case 37: VG_(transfer) (&tilegx->guest_r37, buf, dir, size, mod); break;
+ case 38: VG_(transfer) (&tilegx->guest_r38, buf, dir, size, mod); break;
+ case 39: VG_(transfer) (&tilegx->guest_r39, buf, dir, size, mod); break;
+ case 40: VG_(transfer) (&tilegx->guest_r40, buf, dir, size, mod); break;
+ case 41: VG_(transfer) (&tilegx->guest_r41, buf, dir, size, mod); break;
+ case 42: VG_(transfer) (&tilegx->guest_r42, buf, dir, size, mod); break;
+ case 43: VG_(transfer) (&tilegx->guest_r43, buf, dir, size, mod); break;
+ case 44: VG_(transfer) (&tilegx->guest_r44, buf, dir, size, mod); break;
+ case 45: VG_(transfer) (&tilegx->guest_r45, buf, dir, size, mod); break;
+ case 46: VG_(transfer) (&tilegx->guest_r46, buf, dir, size, mod); break;
+ case 47: VG_(transfer) (&tilegx->guest_r47, buf, dir, size, mod); break;
+ case 48: VG_(transfer) (&tilegx->guest_r48, buf, dir, size, mod); break;
+ case 49: VG_(transfer) (&tilegx->guest_r49, buf, dir, size, mod); break;
+ case 50: VG_(transfer) (&tilegx->guest_r50, buf, dir, size, mod); break;
+ case 51: VG_(transfer) (&tilegx->guest_r51, buf, dir, size, mod); break;
+ case 52: VG_(transfer) (&tilegx->guest_r52, buf, dir, size, mod); break;
+ case 53: VG_(transfer) (&tilegx->guest_r53, buf, dir, size, mod); break;
+ case 54: VG_(transfer) (&tilegx->guest_r54, buf, dir, size, mod); break;
+ case 55: VG_(transfer) (&tilegx->guest_r55, buf, dir, size, mod); break;
+ case 56: VG_(transfer) (&tilegx->guest_r56, buf, dir, size, mod); break;
+ case 57: VG_(transfer) (&tilegx->guest_r57, buf, dir, size, mod); break;
+ case 58: VG_(transfer) (&tilegx->guest_r58, buf, dir, size, mod); break;
+ case 59: VG_(transfer) (&tilegx->guest_r59, buf, dir, size, mod); break;
+ case 60: VG_(transfer) (&tilegx->guest_r60, buf, dir, size, mod); break;
+ case 61: VG_(transfer) (&tilegx->guest_r61, buf, dir, size, mod); break;
+ case 62: VG_(transfer) (&tilegx->guest_r62, buf, dir, size, mod); break;
+ case 63: VG_(transfer) (&tilegx->guest_r63, buf, dir, size, mod); break;
+ case 64: VG_(transfer) (&tilegx->guest_pc, buf, dir, size, mod); break;
+
+ default: VG_(printf)("regno: %d\n", regno); vg_assert(0);
+ }
+}
+
+static
+const char* target_xml ( Bool shadow_mode )
+{
+ if (shadow_mode) {
+ return "tilegx-linux-valgrind.xml";
+ } else {
+ return "tilegx-linux.xml";
+ }
+}
+
+static CORE_ADDR** target_get_dtv (ThreadState *tst)
+{
+ VexGuestTILEGXState* tilegx = (VexGuestTILEGXState*)&tst->arch.vex;
+ // tilegx dtv location similar to mips
+ return (CORE_ADDR**)((CORE_ADDR)tilegx->guest_r53
+ - 0x7000 - sizeof(CORE_ADDR));
+}
+
+static struct valgrind_target_ops low_target = {
+ num_regs,
+ regs,
+ 54, //sp = r54, which is register offset 54 in regs
+ transfer_register,
+ get_pc,
+ set_pc,
+ "tilegx",
+ target_xml,
+ target_get_dtv
+};
+
+void tilegx_init_architecture ( struct valgrind_target_ops *target )
+{
+ *target = low_target;
+ set_register_cache (regs, num_regs);
+ gdbserver_expedite_regs = expedite_regs;
+}
Modified: trunk/coregrind/m_gdbserver/valgrind_low.h
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind_low.h (original)
+++ trunk/coregrind/m_gdbserver/valgrind_low.h Fri Apr 10 13:30:09 2015
@@ -107,5 +107,6 @@
extern void s390x_init_architecture (struct valgrind_target_ops *target);
extern void mips32_init_architecture (struct valgrind_target_ops *target);
extern void mips64_init_architecture (struct valgrind_target_ops *target);
+extern void tilegx_init_architecture (struct valgrind_target_ops *target);
#endif
Modified: trunk/coregrind/m_initimg/initimg-linux.c
==============================================================================
--- trunk/coregrind/m_initimg/initimg-linux.c (original)
+++ trunk/coregrind/m_initimg/initimg-linux.c Fri Apr 10 13:30:09 2015
@@ -1173,6 +1173,21 @@
arch->vex.guest_PC = iifii.initial_client_IP;
arch->vex.guest_r31 = iifii.initial_client_SP;
+# elif defined(VGP_tilegx_linux)
+ vg_assert(0 == sizeof(VexGuestTILEGXState) % 8);
+ vg_assert(0 == sizeof(VexGuestTILEGXState) % VexGuestTILEGXStateAlignment);
+
+ /* Zero out the initial state. */
+ LibVEX_GuestTILEGX_initialise(&arch->vex);
+
+ /* Zero out the shadow areas. */
+ VG_(memset)(&arch->vex_shadow1, 0, sizeof(VexGuestTILEGXState));
+ VG_(memset)(&arch->vex_shadow2, 0, sizeof(VexGuestTILEGXState));
+
+ /* Put essential stuff into the new state. */
+ arch->vex.guest_r54 = iifii.initial_client_SP;
+ arch->vex.guest_pc = iifii.initial_client_IP;
+
# else
# error Unknown platform
# endif
Modified: trunk/coregrind/m_libcassert.c
==============================================================================
--- trunk/coregrind/m_libcassert.c (original)
+++ trunk/coregrind/m_libcassert.c Fri Apr 10 13:30:09 2015
@@ -225,6 +225,29 @@
(srP)->misc.MIPS64.r31 = (ULong)ra; \
(srP)->misc.MIPS64.r28 = (ULong)gp; \
}
+#elif defined(VGP_tilegx_linux)
+# define GET_STARTREGS(srP) \
+ { UInt pc, sp, fp, ra; \
+ __asm__ __volatile__( \
+ "move r8, lr \n" \
+ "jal 0f \n" \
+ "0:\n" \
+ "move %0, lr \n" \
+ "move lr, r8 \n" /* put old lr back*/ \
+ "move %1, sp \n" \
+ "move %2, r52 \n" \
+ "move %3, lr \n" \
+ : "=r" (pc), \
+ "=r" (sp), \
+ "=r" (fp), \
+ "=r" (ra) \
+ : /* reads none */ \
+ : "%r8" /* trashed */ ); \
+ (srP)->r_pc = (ULong)pc - 8; \
+ (srP)->r_sp = (ULong)sp; \
+ (srP)->misc.TILEGX.r52 = (ULong)fp; \
+ (srP)->misc.TILEGX.r55 = (ULong)ra; \
+ }
#else
# error Unknown platform
#endif
Modified: trunk/coregrind/m_libcfile.c
==============================================================================
--- trunk/coregrind/m_libcfile.c (original)
+++ trunk/coregrind/m_libcfile.c Fri Apr 10 13:30:09 2015
@@ -131,8 +131,8 @@
}
SysRes VG_(mknod) ( const HChar* pathname, Int mode, UWord dev )
-{
-# if defined(VGP_arm64_linux)
+{
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
/* ARM64 wants to use __NR_mknodat rather than __NR_mknod. */
SysRes res = VG_(do_syscall4)(__NR_mknodat,
VKI_AT_FDCWD, (UWord)pathname, mode, dev);
@@ -147,7 +147,7 @@
SysRes VG_(open) ( const HChar* pathname, Int flags, Int mode )
{
-# if defined(VGP_arm64_linux)
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
/* ARM64 wants to use __NR_openat rather than __NR_open. */
SysRes res = VG_(do_syscall4)(__NR_openat,
VKI_AT_FDCWD, (UWord)pathname, flags, mode);
@@ -238,7 +238,7 @@
} else {
return -1;
}
-# elif defined(VGP_arm64_linux)
+# elif defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
SysRes res = VG_(do_syscall2)(__NR_pipe2, (UWord)fd, 0);
return sr_isError(res) ? -1 : 0;
# elif defined(VGO_linux)
@@ -328,7 +328,7 @@
# endif /* defined(__NR_stat64) */
/* This is the fallback ("vanilla version"). */
{ struct vki_stat buf;
-# if defined(VGP_arm64_linux)
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
res = VG_(do_syscall3)(__NR3264_fstatat, VKI_AT_FDCWD,
(UWord)file_name, (UWord)&buf);
# else
@@ -434,13 +434,18 @@
Int VG_(rename) ( const HChar* old_name, const HChar* new_name )
{
+# if defined(VGP_tilegx_linux)
+ SysRes res = VG_(do_syscall3)(__NR_renameat, AT_FDCWD,
+ (UWord)old_name, (UWord)new_name);
+# else
SysRes res = VG_(do_syscall2)(__NR_rename, (UWord)old_name, (UWord)new_name);
+# endif
return sr_isError(res) ? (-1) : 0;
}
Int VG_(unlink) ( const HChar* file_name )
{
-# if defined(VGP_arm64_linux)
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
SysRes res = VG_(do_syscall2)(__NR_unlinkat, VKI_AT_FDCWD,
(UWord)file_name);
# else
@@ -515,7 +520,7 @@
SysRes VG_(poll) (struct vki_pollfd *fds, Int nfds, Int timeout)
{
SysRes res;
-# if defined(VGP_arm64_linux)
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
/* ARM64 wants to use __NR_ppoll rather than __NR_poll. */
struct vki_timespec timeout_ts;
if (timeout >= 0) {
@@ -545,7 +550,7 @@
{
SysRes res;
/* res = readlink( path, buf, bufsiz ); */
-# if defined(VGP_arm64_linux)
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)path, (UWord)buf, bufsiz);
# else
@@ -581,7 +586,7 @@
UWord w = (irusr ? VKI_R_OK : 0)
| (iwusr ? VKI_W_OK : 0)
| (ixusr ? VKI_X_OK : 0);
-# if defined(VGP_arm64_linux)
+# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
SysRes res = VG_(do_syscall3)(__NR_faccessat, VKI_AT_FDCWD, (UWord)path, w);
# else
SysRes res = VG_(do_syscall2)(__NR_access, (UWord)path, w);
@@ -721,7 +726,7 @@
# elif defined(VGP_amd64_linux) || defined(VGP_s390x_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux)
+ || de...
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