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From: <sv...@va...> - 2014-11-25 12:18:01
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Author: sewardj
Date: Tue Nov 25 12:17:53 2014
New Revision: 3023
Log:
arm64: implement "BRK #imm16".
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/host_arm64_defs.c
trunk/priv/host_arm64_isel.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Tue Nov 25 12:17:53 2014
@@ -6784,6 +6784,21 @@
return True;
}
+ /* -------------------- BRK -------------------- */
+ /* 31 23 20 4
+ 1101 0100 001 imm16 00000 BRK #imm16
+ */
+ if (INSN(31,24) == BITS8(1,1,0,1,0,1,0,0)
+ && INSN(23,21) == BITS3(0,0,1) && INSN(4,0) == BITS5(0,0,0,0,0)) {
+ UInt imm16 = INSN(20,5);
+ /* Request SIGTRAP and then restart of this insn. */
+ putPC(mkU64(guest_PC_curr_instr + 0));
+ dres->whatNext = Dis_StopHere;
+ dres->jk_StopHere = Ijk_SigTRAP;
+ DIP("brk #%u\n", imm16);
+ return True;
+ }
+
//fail:
vex_printf("ARM64 front end: branch_etc\n");
return False;
Modified: trunk/priv/host_arm64_defs.c
==============================================================================
--- trunk/priv/host_arm64_defs.c (original)
+++ trunk/priv/host_arm64_defs.c Tue Nov 25 12:17:53 2014
@@ -3529,7 +3529,7 @@
case Ijk_InvalICache: trcval = VEX_TRC_JMP_INVALICACHE; break;
case Ijk_FlushDCache: trcval = VEX_TRC_JMP_FLUSHDCACHE; break;
case Ijk_NoRedir: trcval = VEX_TRC_JMP_NOREDIR; break;
- //case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break;
+ case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break;
//case Ijk_SigSEGV: trcval = VEX_TRC_JMP_SIGSEGV; break;
case Ijk_Boring: trcval = VEX_TRC_JMP_BORING; break;
/* We don't expect to see the following being assisted. */
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Tue Nov 25 12:17:53 2014
@@ -3838,6 +3838,7 @@
case Ijk_Sys_syscall:
case Ijk_InvalICache:
case Ijk_FlushDCache:
+ case Ijk_SigTRAP:
{
HReg r = iselIntExpr_R(env, next);
ARM64AMode* amPC = mk_baseblock_64bit_access_amode(offsIP);
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