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From: <sv...@va...> - 2014-01-15 16:26:42
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Author: dejanj
Date: Wed Jan 15 16:26:31 2014
New Revision: 2806
Log:
mips64: Change the initial value of fpu registers.
Initial value of mips fpu registers should be nan instead of 0xffffffffffffffff.
Modified:
trunk/priv/guest_mips_helpers.c
Modified: trunk/priv/guest_mips_helpers.c
==============================================================================
--- trunk/priv/guest_mips_helpers.c (original)
+++ trunk/priv/guest_mips_helpers.c Wed Jan 15 16:26:31 2014
@@ -212,38 +212,38 @@
vex_state->guest_LO = 0; /* Multiply and divide register lower result */
/* FPU Registers */
- vex_state->guest_f0 = 0xffffffffffffffffULL; /* Floting point registers */
- vex_state->guest_f1 = 0xffffffffffffffffULL;
- vex_state->guest_f2 = 0xffffffffffffffffULL;
- vex_state->guest_f3 = 0xffffffffffffffffULL;
- vex_state->guest_f4 = 0xffffffffffffffffULL;
- vex_state->guest_f5 = 0xffffffffffffffffULL;
- vex_state->guest_f6 = 0xffffffffffffffffULL;
- vex_state->guest_f7 = 0xffffffffffffffffULL;
- vex_state->guest_f8 = 0xffffffffffffffffULL;
- vex_state->guest_f9 = 0xffffffffffffffffULL;
- vex_state->guest_f10 = 0xffffffffffffffffULL;
- vex_state->guest_f11 = 0xffffffffffffffffULL;
- vex_state->guest_f12 = 0xffffffffffffffffULL;
- vex_state->guest_f13 = 0xffffffffffffffffULL;
- vex_state->guest_f14 = 0xffffffffffffffffULL;
- vex_state->guest_f15 = 0xffffffffffffffffULL;
- vex_state->guest_f16 = 0xffffffffffffffffULL;
- vex_state->guest_f17 = 0xffffffffffffffffULL;
- vex_state->guest_f18 = 0xffffffffffffffffULL;
- vex_state->guest_f19 = 0xffffffffffffffffULL;
- vex_state->guest_f20 = 0xffffffffffffffffULL;
- vex_state->guest_f21 = 0xffffffffffffffffULL;
- vex_state->guest_f22 = 0xffffffffffffffffULL;
- vex_state->guest_f23 = 0xffffffffffffffffULL;
- vex_state->guest_f24 = 0xffffffffffffffffULL;
- vex_state->guest_f25 = 0xffffffffffffffffULL;
- vex_state->guest_f26 = 0xffffffffffffffffULL;
- vex_state->guest_f27 = 0xffffffffffffffffULL;
- vex_state->guest_f28 = 0xffffffffffffffffULL;
- vex_state->guest_f29 = 0xffffffffffffffffULL;
- vex_state->guest_f30 = 0xffffffffffffffffULL;
- vex_state->guest_f31 = 0xffffffffffffffffULL;
+ vex_state->guest_f0 = 0x7ff800007ff80000ULL; /* Floting point registers */
+ vex_state->guest_f1 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f2 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f3 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f4 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f5 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f6 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f7 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f8 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f9 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f10 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f11 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f12 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f13 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f14 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f15 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f16 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f17 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f18 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f19 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f20 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f21 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f22 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f23 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f24 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f25 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f26 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f27 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f28 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f29 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f30 = 0x7ff800007ff80000ULL;
+ vex_state->guest_f31 = 0x7ff800007ff80000ULL;
vex_state->guest_FIR = 0; /* FP implementation and revision register */
vex_state->guest_FCCR = 0; /* FP condition codes register */
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