|
From: <sv...@va...> - 2013-02-27 23:19:28
|
petarj 2013-02-27 23:17:33 +0000 (Wed, 27 Feb 2013)
New Revision: 13292
Log:
mips: adding MIPS64LE support to Valgrind
Necessary changes to Valgrind to support MIPS64LE on Linux.
Minor cleanup/style changes embedded in the patch as well.
The change corresponds to r2687 in VEX.
Patch written by Dejan Jevtic and Petar Jovanovic.
More information about this issue:
https://bugs.kde.org/show_bug.cgi?id=313267
Added files:
trunk/coregrind/m_dispatch/dispatch-mips64-linux.S
trunk/coregrind/m_gdbserver/mips64-cp0-valgrind-s1.xml
trunk/coregrind/m_gdbserver/mips64-cp0-valgrind-s2.xml
trunk/coregrind/m_gdbserver/mips64-cp0.xml
trunk/coregrind/m_gdbserver/mips64-cpu-valgrind-s1.xml
trunk/coregrind/m_gdbserver/mips64-cpu-valgrind-s2.xml
trunk/coregrind/m_gdbserver/mips64-cpu.xml
trunk/coregrind/m_gdbserver/mips64-fpu-valgrind-s1.xml
trunk/coregrind/m_gdbserver/mips64-fpu-valgrind-s2.xml
trunk/coregrind/m_gdbserver/mips64-fpu.xml
trunk/coregrind/m_gdbserver/mips64-linux-valgrind.xml
trunk/coregrind/m_gdbserver/mips64-linux.xml
trunk/coregrind/m_gdbserver/valgrind-low-mips64.c
trunk/coregrind/m_sigframe/sigframe-mips64-linux.c
trunk/coregrind/m_syswrap/syscall-mips64-linux.S
trunk/coregrind/m_syswrap/syswrap-mips64-linux.c
trunk/include/vki/vki-mips64-linux.h
trunk/include/vki/vki-posixtypes-mips64-linux.h
trunk/include/vki/vki-scnums-mips64-linux.h
Modified files:
trunk/Makefile.all.am
trunk/Makefile.tool.am
trunk/README
trunk/cachegrind/cg-arch.c
trunk/cachegrind/cg_branchpred.c
trunk/configure.in
trunk/coregrind/Makefile.am
trunk/coregrind/launcher-linux.c
trunk/coregrind/m_aspacemgr/aspacemgr-common.c
trunk/coregrind/m_aspacemgr/aspacemgr-linux.c
trunk/coregrind/m_cache.c
trunk/coregrind/m_coredump/coredump-elf.c
trunk/coregrind/m_debugger.c
trunk/coregrind/m_debuginfo/d3basics.c
trunk/coregrind/m_debuginfo/debuginfo.c
trunk/coregrind/m_debuginfo/priv_storage.h
trunk/coregrind/m_debuginfo/readdwarf.c
trunk/coregrind/m_debuginfo/readelf.c
trunk/coregrind/m_debuginfo/storage.c
trunk/coregrind/m_debuglog.c
trunk/coregrind/m_dispatch/dispatch-mips32-linux.S
trunk/coregrind/m_gdbserver/target.c
trunk/coregrind/m_gdbserver/valgrind_low.h
trunk/coregrind/m_initimg/initimg-linux.c
trunk/coregrind/m_libcassert.c
trunk/coregrind/m_libcfile.c
trunk/coregrind/m_libcproc.c
trunk/coregrind/m_machine.c
trunk/coregrind/m_main.c
trunk/coregrind/m_redir.c
trunk/coregrind/m_scheduler/scheduler.c
trunk/coregrind/m_sigframe/sigframe-mips32-linux.c
trunk/coregrind/m_signals.c
trunk/coregrind/m_stacktrace.c
trunk/coregrind/m_syscall.c
trunk/coregrind/m_syswrap/priv_types_n_macros.h
trunk/coregrind/m_syswrap/syswrap-linux.c
trunk/coregrind/m_syswrap/syswrap-main.c
trunk/coregrind/m_syswrap/syswrap-mips32-linux.c
trunk/coregrind/m_trampoline.S
trunk/coregrind/m_translate.c
trunk/coregrind/m_ume/elf.c
trunk/coregrind/pub_core_aspacemgr.h
trunk/coregrind/pub_core_basics.h
trunk/coregrind/pub_core_debuginfo.h
trunk/coregrind/pub_core_machine.h
trunk/coregrind/pub_core_mallocfree.h
trunk/coregrind/pub_core_syscall.h
trunk/coregrind/pub_core_threadstate.h
trunk/coregrind/pub_core_trampoline.h
trunk/coregrind/pub_core_transtab_asm.h
trunk/coregrind/vgdb.c
trunk/drd/drd_bitmap.h
trunk/drd/drd_clientreq.c
trunk/drd/drd_load_store.c
trunk/drd/drd_thread.c
trunk/include/Makefile.am
trunk/include/pub_tool_basics.h
trunk/include/pub_tool_machine.h
trunk/include/pub_tool_vkiscnums_asm.h
trunk/include/valgrind.h
trunk/include/vki/vki-linux.h
trunk/memcheck/mc_machine.c
trunk/tests/arch_test.c
trunk/tests/platform_test
Modified: trunk/include/pub_tool_machine.h (+6 -0)
===================================================================
--- trunk/include/pub_tool_machine.h 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/include/pub_tool_machine.h 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -91,6 +91,12 @@
# define VG_CLREQ_SZB 20
# define VG_STACK_REDZONE_SZB 0
+#elif defined(VGP_mips64_linux)
+# define VG_MIN_INSTR_SZB 4
+# define VG_MAX_INSTR_SZB 4
+# define VG_CLREQ_SZB 20
+# define VG_STACK_REDZONE_SZB 0
+
#else
# error Unknown platform
#endif
Modified: trunk/coregrind/pub_core_debuginfo.h (+1 -1)
===================================================================
--- trunk/coregrind/pub_core_debuginfo.h 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/pub_core_debuginfo.h 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -120,7 +120,7 @@
typedef
struct { Addr ia; Addr sp; Addr fp; Addr lr;}
D3UnwindRegs;
-#elif defined(VGA_mips32)
+#elif defined(VGA_mips32) || defined(VGA_mips64)
typedef
struct { Addr pc; Addr sp; Addr fp; Addr ra; }
D3UnwindRegs;
Added: trunk/coregrind/m_dispatch/dispatch-mips64-linux.S (+245 -0)
===================================================================
--- trunk/coregrind/m_dispatch/dispatch-mips64-linux.S 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/m_dispatch/dispatch-mips64-linux.S 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -0,0 +1,245 @@
+
+/*--------------------------------------------------------------------*/
+/*--- The core dispatch loop, for jumping to a code address. ---*/
+/*--- dispatch-mips64-linux.S ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2013 RT-RK
+ mip...@rt...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+
+#if defined(VGP_mips64_linux)
+
+#include "pub_core_basics_asm.h"
+#include "pub_core_dispatch_asm.h"
+#include "pub_core_transtab_asm.h"
+#include "libvex_guest_offsets.h" /* for OFFSET_mips_PC */
+
+
+/*------------------------------------------------------------*/
+/*--- ---*/
+/*--- The dispatch loop. VG_(disp_run_translations) is ---*/
+/*--- used to run all translations, ---*/
+/*--- including no-redir ones. ---*/
+/*--- ---*/
+/*------------------------------------------------------------*/
+
+/*----------------------------------------------------*/
+/*--- Entry and preamble (set everything up) ---*/
+/*----------------------------------------------------*/
+
+/* signature:
+void VG_(disp_run_translations)( UWord* two_words,
+ void* guest_state,
+ Addr host_addr );
+*/
+
+.text
+.globl VG_(disp_run_translations)
+VG_(disp_run_translations):
+ /* a0 ($4) holds two_words */
+ /* a1 ($5) holds guest_state */
+ /* a2 ($6) holds host_addr */
+
+ /* New stack frame. Stack must remain 16 aligned (at least) */
+ daddiu $29, -176
+
+ /* Save ra */
+ sd $31, 72($29)
+
+ /* ... and s0 - s7 */
+ sd $16, 80($29)
+ sd $17, 88($29)
+ sd $18, 96($29)
+ sd $19, 104($29)
+ sd $20, 112($29)
+ sd $21, 120($29)
+ sd $22, 128($29)
+ sd $23, 136($29)
+
+ /* ... and gp, fp/s8 */
+ sd $28, 144($29)
+ sd $30, 152($29)
+
+ /* Save a0 ($4) on stack. In postamble it will be restored such that the
+ return values can be written */
+ sd $4, 160($29)
+
+ /* Load address of guest state into guest state register ($23) */
+ move $23, $5
+
+ /* and jump into the code cache. Chained translations in
+ the code cache run, until for whatever reason, they can't
+ continue. When that happens, the translation in question
+ will jump (or call) to one of the continuation points
+ VG_(cp_...) below. */
+ jr $6
+ /*NOTREACHED*/
+
+/*----------------------------------------------------*/
+/*--- Postamble and exit. ---*/
+/*----------------------------------------------------*/
+
+postamble:
+ /* At this point, $2 and $3 contain two
+ words to be returned to the caller. $2
+ holds a TRC value, and $3 optionally may
+ hold another word (for CHAIN_ME exits, the
+ address of the place to patch.) */
+
+ /* Restore $4 from stack; holds address of two_words */
+ ld $4, 160($29)
+ sd $2, 0($4) /* Store $2 to two_words[0] */
+ sd $3, 8($4) /* Store $3 to two_words[1] */
+
+ /* Restore callee-saved registers... */
+
+ /* Restore ra */
+ ld $31, 72($29)
+
+ /* ... and s0 - s7 */
+ ld $16, 80($29)
+ ld $17, 88($29)
+ ld $18, 96($29)
+ ld $19, 104($29)
+ ld $20, 112($29)
+ ld $21, 120($29)
+ ld $22, 128($29)
+ ld $23, 136($29)
+
+ /* ... and gp, fp/s8 */
+ ld $28, 144($29)
+ ld $30, 152($29)
+
+ daddiu $29, 176 /* stack_size */
+ jr $31
+ nop
+
+/*----------------------------------------------------*/
+/*--- Continuation points ---*/
+/*----------------------------------------------------*/
+
+/* ------ Chain me to slow entry point ------ */
+.global VG_(disp_cp_chain_me_to_slowEP)
+VG_(disp_cp_chain_me_to_slowEP):
+ /* We got called. The return address indicates
+ where the patching needs to happen. Collect
+ the return address and, exit back to C land,
+ handing the caller the pair (Chain_me_S, RA) */
+ li $2, VG_TRC_CHAIN_ME_TO_SLOW_EP
+ move $3, $31
+ /* 8 = mkLoadImm_EXACTLY2or6
+ 4 = jalr $9
+ 4 = nop */
+ daddiu $3, $3, -32
+ b postamble
+
+/* ------ Chain me to slow entry point ------ */
+.global VG_(disp_cp_chain_me_to_fastEP)
+VG_(disp_cp_chain_me_to_fastEP):
+ /* We got called. The return address indicates
+ where the patching needs to happen. Collect
+ the return address and, exit back to C land,
+ handing the caller the pair (Chain_me_S, RA) */
+ li $2, VG_TRC_CHAIN_ME_TO_FAST_EP
+ move $3, $31
+ /* 8 = mkLoadImm_EXACTLY2or6
+ 4 = jalr $9
+ 4 = nop */
+ daddiu $3, $3, -32
+ b postamble
+
+/* ------ Indirect but boring jump ------ */
+.global VG_(disp_cp_xindir)
+VG_(disp_cp_xindir):
+ /* Where are we going? */
+ ld $11, OFFSET_mips64_PC($23)
+
+ lw $13, vgPlain_stats__n_xindirs_32
+ addiu $13, $13, 0x1
+ sw $13, vgPlain_stats__n_xindirs_32
+
+ /* try a fast lookup in the translation cache */
+ /* t1 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
+ = (t8 >> 2 & VG_TT_FAST_MASK) << 3 */
+
+ move $14, $11
+ li $12, VG_TT_FAST_MASK
+ srl $14, $14, 2
+ and $14, $14, $12
+ sll $14, $14, 3
+
+ /* t2 = (addr of VG_(tt_fast)) + t1 */
+ la $13, VG_(tt_fast)
+ addu $13, $13, $14
+
+ ld $12, 0($13) /* t3 = VG_(tt_fast)[hash] :: ULong* */
+ addi $13, $13, 8
+ ld $25, 0($13) /* little-endian, so comparing 1st 32bit word */
+ nop
+
+check:
+ bne $12, $11, fast_lookup_failed
+ /* run the translation */
+ jr $25
+ .long 0x0 /* persuade insn decoders not to speculate past here */
+
+fast_lookup_failed:
+ /* %PC is up to date */
+ /* back out decrement of the dispatch counter */
+ /* hold dispatch_ctr in t0 (r8) */
+ lw $13, vgPlain_stats__n_xindirs_32
+ addiu $13, $13, 0x1
+ sw $13, vgPlain_stats__n_xindirs_32
+ li $2, VG_TRC_INNER_FASTMISS
+ li $3, 0
+ b postamble
+
+/* ------ Assisted jump ------ */
+ .global VG_(disp_cp_xassisted)
+VG_(disp_cp_xassisted):
+ /* guest-state-pointer contains the TRC. Put the value into the
+ return register */
+ move $2, $23
+ move $3, $0
+ b postamble
+
+/* ------ Event check failed ------ */
+ .global VG_(disp_cp_evcheck_fail)
+VG_(disp_cp_evcheck_fail):
+ li $2, VG_TRC_INNER_COUNTERZERO
+ move $3, $0
+ b postamble
+
+.size VG_(disp_run_translations), .-VG_(disp_run_translations)
+
+
+/* Let the linker know we do not need an executable stack */
+.section .note.GNU-stack,"",@progbits
+
+#endif // defined(VGP_mips64_linux)
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Modified: trunk/coregrind/pub_core_trampoline.h (+5 -0)
===================================================================
--- trunk/coregrind/pub_core_trampoline.h 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/pub_core_trampoline.h 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -133,6 +133,11 @@
extern UInt VG_(mips32_linux_REDIR_FOR_strlen)( void* );
#endif
+#if defined(VGP_mips64_linux)
+extern Addr VG_(mips64_linux_SUBST_FOR_rt_sigreturn);
+extern UInt VG_(mips64_linux_REDIR_FOR_strlen)( void* );
+#endif
+
#endif // __PUB_CORE_TRAMPOLINE_H
/*--------------------------------------------------------------------*/
Modified: trunk/drd/drd_thread.c (+1 -1)
===================================================================
--- trunk/drd/drd_thread.c 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/drd/drd_thread.c 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -597,7 +597,7 @@
}
/** Store the thread mode: joinable or detached. */
-#if defined(VGP_mips32_linux)
+#if defined(VGP_mips32_linux) || defined(VGP_mips64_linux)
/* There is a cse related issue in gcc for MIPS. Optimization level
has to be lowered, so cse related optimizations are not
included.*/
Modified: trunk/coregrind/m_ume/elf.c (+6 -0)
===================================================================
--- trunk/coregrind/m_ume/elf.c 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/m_ume/elf.c 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -338,8 +338,14 @@
which totally screws things up, because nothing else can go
there. So bump the hacky load addess along by 0x8000, to
0x108000. */
+ /* Later .. on mips64 we can't use 0x108000, because mapelf will fail. */
+#if defined(VGP_mips64_linux)
+ if (ebase < 0x100000)
+ ebase = 0x100000;
+#else
if (ebase < 0x108000)
ebase = 0x108000;
+#endif
}
info->phnum = e->e.e_phnum;
Added: trunk/coregrind/m_gdbserver/mips64-cp0.xml (+13 -0)
===================================================================
--- trunk/coregrind/m_gdbserver/mips64-cp0.xml 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/m_gdbserver/mips64-cp0.xml 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.mips.cp0">
+ <reg name="status" bitsize="64" regnum="32"/>
+ <reg name="badvaddr" bitsize="64" regnum="35"/>
+ <reg name="cause" bitsize="64" regnum="36"/>
+</feature>
Modified: trunk/coregrind/m_debuginfo/readelf.c (+3 -2)
===================================================================
--- trunk/coregrind/m_debuginfo/readelf.c 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/m_debuginfo/readelf.c 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -2042,7 +2042,7 @@
/* PLT is different on different platforms, it seems. */
# if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \
|| defined(VGP_arm_linux) || defined (VGP_s390x_linux) \
- || defined(VGP_mips32_linux)
+ || defined(VGP_mips32_linux) || defined(VGP_mips64_linux)
/* Accept .plt where mapped as rx (code) */
if (0 == VG_(strcmp)(name, ".plt")) {
if (inrx && !di->plt_present) {
@@ -2693,7 +2693,8 @@
&& !defined(VGP_s390x_linux) \
&& !defined(VGP_ppc64_linux) \
&& !defined(VGPV_arm_linux_android) \
- && !defined(VGPV_x86_linux_android)
+ && !defined(VGPV_x86_linux_android) \
+ && !defined(VGP_mips64_linux)
if (stab_img && stabstr_img) {
ML_(read_debuginfo_stabs) ( di, stab_img, stab_sz,
stabstr_img, stabstr_sz );
Modified: trunk/coregrind/m_debugger.c (+1 -1)
===================================================================
--- trunk/coregrind/m_debugger.c 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/m_debugger.c 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -307,7 +307,7 @@
return VG_(ptrace)(VKI_PTRACE_POKEUSR_AREA, pid, &pa, NULL);
-#elif defined(VGP_mips32_linux)
+#elif defined(VGP_mips32_linux) || defined(VGP_mips64_linux)
struct vki_user_regs_struct regs;
VG_(memset)(®s, 0, sizeof(regs));
regs.MIPS_r0 = vex->guest_r0;
Modified: trunk/coregrind/m_libcproc.c (+3 -2)
===================================================================
--- trunk/coregrind/m_libcproc.c 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/m_libcproc.c 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -533,7 +533,8 @@
platform. */
Int VG_(getgroups)( Int size, UInt* list )
{
-# if defined(VGP_x86_linux) || defined(VGP_ppc32_linux)
+# if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \
+ || defined(VGP_mips64_linux)
Int i;
SysRes sres;
UShort list16[64];
@@ -762,7 +763,7 @@
Addr endaddr = startaddr + nbytes;
VG_(do_syscall2)(__NR_ARM_cacheflush, startaddr, endaddr);
-# elif defined(VGA_mips32)
+# elif defined(VGA_mips32) || defined(VGA_mips64)
SysRes sres = VG_(do_syscall3)(__NR_cacheflush, (UWord) ptr,
(UWord) nbytes, (UWord) 3);
vg_assert( sres._isError == 0 );
Modified: trunk/include/pub_tool_basics.h (+3 -3)
===================================================================
--- trunk/include/pub_tool_basics.h 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/include/pub_tool_basics.h 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -269,10 +269,10 @@
#undef VG_LITTLEENDIAN
#if defined(VGA_x86) || defined(VGA_amd64) || defined (VGA_arm) \
- || (defined(VGA_mips32) && defined (_MIPSEL))
+ || ((defined(VGA_mips32) || defined(VGA_mips64)) && defined (_MIPSEL))
# define VG_LITTLEENDIAN 1
#elif defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_s390x) \
- || (defined(VGA_mips32) && defined (_MIPSEB))
+ || ((defined(VGA_mips32) || defined(VGA_mips64)) && defined (_MIPSEB))
# define VG_BIGENDIAN 1
#else
# error Unknown arch
@@ -283,7 +283,7 @@
# define VG_REGPARM(n) __attribute__((regparm(n)))
#elif defined(VGA_amd64) || defined(VGA_ppc32) \
|| defined(VGA_ppc64) || defined(VGA_arm) || defined(VGA_s390x) \
- || defined(VGA_mips32)
+ || defined(VGA_mips32) || defined(VGA_mips64)
# define VG_REGPARM(n) /* */
#else
# error Unknown arch
Modified: trunk/drd/drd_load_store.c (+2 -0)
===================================================================
--- trunk/drd/drd_load_store.c 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/drd/drd_load_store.c 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -51,6 +51,8 @@
#define STACK_POINTER_OFFSET OFFSET_s390x_r15
#elif defined(VGA_mips32)
#define STACK_POINTER_OFFSET OFFSET_mips32_r29
+#elif defined(VGA_mips64)
+#define STACK_POINTER_OFFSET OFFSET_mips64_r29
#else
#error Unknown architecture.
#endif
Modified: trunk/coregrind/pub_core_transtab_asm.h (+2 -1)
===================================================================
--- trunk/coregrind/pub_core_transtab_asm.h 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/coregrind/pub_core_transtab_asm.h 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -62,7 +62,8 @@
#elif defined(VGA_s390x) || defined(VGA_arm)
# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 1) & VG_TT_FAST_MASK)
-#elif defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_mips32)
+#elif defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_mips32) \
+ || defined(VGA_mips64)
# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 2) & VG_TT_FAST_MASK)
#else
Modified: trunk/include/valgrind.h (+726 -234)
===================================================================
--- trunk/include/valgrind.h 2013-02-26 21:54:28 +00:00 (rev 13291)
+++ trunk/include/valgrind.h 2013-02-27 23:17:33 +00:00 (rev 13292)
@@ -118,6 +118,7 @@
#undef PLAT_arm_linux
#undef PLAT_s390x_linux
#undef PLAT_mips32_linux
+#undef PLAT_mips64_linux
#if defined(__APPLE__) && defined(__i386__)
@@ -140,7 +141,11 @@
#elif defined(__linux__) && defined(__s390__) && defined(__s390x__)
# define PLAT_s390x_linux 1
#elif defined(__linux__) && defined(__mips__)
+#if (__mips==64)
+# define PLAT_mips64_linux 1
+#else
# define PLAT_mips32_linux 1
+#endif
#else
/* If we're not compiling for our target platform, don't generate
any inline asms. */
@@ -763,7 +768,7 @@
"move %0, $11\n\t" /*result*/ \
: "=r" (_zzq_result) \
: "r" (_zzq_default), "r" (&_zzq_args[0]) \
- : "cc","memory", "t3", "t4"); \
+ : "$11", "$12"); \
_zzq_result; \
})
@@ -776,7 +781,7 @@
"move %0, $11" /*result*/ \
: "=r" (__addr) \
: \
- : "cc", "memory" , "t3" \
+ : "$11" \
); \
_zzq_orig->nraddr = __addr; \
}
@@ -796,6 +801,75 @@
#endif /* PLAT_mips32_linux */
+/* ------------------------- mips64-linux ---------------- */
+
+#if defined(PLAT_mips64_linux)
+
+typedef
+ struct {
+ unsigned long long nraddr; /* where's the code? */
+ }
+ OrigFn;
+
+/* dsll $0,$0, 3
+ * dsll $0,$0, 13
+ * dsll $0,$0, 29
+ * dsll $0,$0, 19*/
+#define __SPECIAL_INSTRUCTION_PREAMBLE \
+ "dsll $0,$0, 3 ; dsll $0,$0,13\n\t" \
+ "dsll $0,$0,29 ; dsll $0,$0,19\n\t"
+
+#define VALGRIND_DO_CLIENT_REQUEST_EXPR( \
+ _zzq_default, _zzq_request, \
+ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
+ __extension__ \
+ ({ volatile unsigned long long int _zzq_args[6]; \
+ volatile unsigned long long int _zzq_result; \
+ _zzq_args[0] = (unsigned long long int)(_zzq_request); \
+ _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \
+ _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \
+ _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \
+ _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \
+ _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \
+ __asm__ volatile("move $11, %1\n\t" /*default*/ \
+ "move $12, %2\n\t" /*ptr*/ \
+ __SPECIAL_INSTRUCTION_PREAMBLE \
+ /* $11 = client_request ( $12 ) */ \
+ "or $13, $13, $13\n\t" \
+ "move %0, $11\n\t" /*result*/ \
+ : "=r" (_zzq_result) \
+ : "r" (_zzq_default), "r" (&_zzq_args[0]) \
+ : "$11", "$12"); \
+ _zzq_result; \
+ })
+
+#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
+ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
+ volatile unsigned long long int __addr; \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
+ /* $11 = guest_NRADDR */ \
+ "or $14, $14, $14\n\t" \
+ "move %0, $11" /*result*/ \
+ : "=r" (__addr) \
+ : \
+ : "$11"); \
+ _zzq_orig->nraddr = __addr; \
+ }
+
+#define VALGRIND_CALL_NOREDIR_T9 \
+ __SPECIAL_INSTRUCTION_PREAMBLE \
+ /* call-noredir $25 */ \
+ "or $15, $15, $15\n\t"
+
+#define VALGRIND_VEX_INJECT_IR() \
+ do { \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
+ "or $11, $11, $11\n\t" \
+ ); \
+ } while (0)
+
+#endif /* PLAT_mips64_linux */
+
/* Insert assembly code for other platforms here... */
#endif /* NVALGRIND */
@@ -3881,7 +3955,7 @@
#endif /* PLAT_s390x_linux */
-/* ------------------------- mips-linux ------------------------- */
+/* ------------------------- mips32-linux ----------------------- */
#if defined(PLAT_mips32_linux)
@@ -3901,19 +3975,19 @@
_argvec[0] = (unsigned long)_orig.nraddr; \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "subu $29, $29, 16 \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "subu $29, $29, 16 \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
"addu $29, $29, 16\n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
"addu $29, $29, 8 \n\t" \
- "move %0, $v0\n" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -3927,20 +4001,20 @@
_argvec[1] = (unsigned long)(arg1); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
"subu $29, $29, 16 \n\t" \
- "lw $a0, 4(%1) \n\t" /* arg1*/ \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "lw $4, 4(%1) \n\t" /* arg1*/ \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
"addu $29, $29, 16 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
"addu $29, $29, 8 \n\t" \
- "move %0, $v0\n" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
- : /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*in*/ "0" (&_argvec[0]) \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -3955,21 +4029,21 @@
_argvec[2] = (unsigned long)(arg2); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
"subu $29, $29, 16 \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
"addu $29, $29, 16 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
"addu $29, $29, 8 \n\t" \
- "move %0, $v0\n" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -3985,22 +4059,22 @@
_argvec[3] = (unsigned long)(arg3); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
"subu $29, $29, 16 \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
"addu $29, $29, 16 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
"addu $29, $29, 8 \n\t" \
- "move %0, $v0\n" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4017,23 +4091,23 @@
_argvec[4] = (unsigned long)(arg4); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
"subu $29, $29, 16 \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
"addu $29, $29, 16 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
"addu $29, $29, 8 \n\t" \
- "move %0, $v0\n" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4051,25 +4125,25 @@
_argvec[5] = (unsigned long)(arg5); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 24\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 24\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
"addu $29, $29, 24 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
- "addu $sp, $sp, 8 \n\t" \
- "move %0, $v0\n" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
+ "addu $29, $29, 8 \n\t" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4087,28 +4161,28 @@
_argvec[6] = (unsigned long)(arg6); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 32\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 24(%1) \n\t" \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 32\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 24(%1) \n\t" \
"nop\n\t" \
- "sw $a0, 20($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $4, 20($29) \n\t" \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
- "addu $sp, $sp, 32 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
- "addu $sp, $sp, 8 \n\t" \
- "move %0, $v0\n" \
+ "addu $29, $29, 32 \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
+ "addu $29, $29, 8 \n\t" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4129,29 +4203,29 @@
_argvec[7] = (unsigned long)(arg7); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 32\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 24(%1) \n\t" \
- "sw $a0, 20($sp) \n\t" \
- "lw $a0, 28(%1) \n\t" \
- "sw $a0, 24($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 32\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 24(%1) \n\t" \
+ "sw $4, 20($29) \n\t" \
+ "lw $4, 28(%1) \n\t" \
+ "sw $4, 24($29) \n\t" \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
- "addu $sp, $sp, 32 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
- "addu $sp, $sp, 8 \n\t" \
- "move %0, $v0\n" \
+ "addu $29, $29, 32 \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
+ "addu $29, $29, 8 \n\t" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4173,31 +4247,31 @@
_argvec[8] = (unsigned long)(arg8); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 40\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 24(%1) \n\t" \
- "sw $a0, 20($sp) \n\t" \
- "lw $a0, 28(%1) \n\t" \
- "sw $a0, 24($sp) \n\t" \
- "lw $a0, 32(%1) \n\t" \
- "sw $a0, 28($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 40\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 24(%1) \n\t" \
+ "sw $4, 20($29) \n\t" \
+ "lw $4, 28(%1) \n\t" \
+ "sw $4, 24($29) \n\t" \
+ "lw $4, 32(%1) \n\t" \
+ "sw $4, 28($29) \n\t" \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
- "addu $sp, $sp, 40 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
- "addu $sp, $sp, 8 \n\t" \
- "move %0, $v0\n" \
+ "addu $29, $29, 40 \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
+ "addu $29, $29, 8 \n\t" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4220,33 +4294,33 @@
_argvec[9] = (unsigned long)(arg9); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 40\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 24(%1) \n\t" \
- "sw $a0, 20($sp) \n\t" \
- "lw $a0, 28(%1) \n\t" \
- "sw $a0, 24($sp) \n\t" \
- "lw $a0, 32(%1) \n\t" \
- "sw $a0, 28($sp) \n\t" \
- "lw $a0, 36(%1) \n\t" \
- "sw $a0, 32($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 40\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 24(%1) \n\t" \
+ "sw $4, 20($29) \n\t" \
+ "lw $4, 28(%1) \n\t" \
+ "sw $4, 24($29) \n\t" \
+ "lw $4, 32(%1) \n\t" \
+ "sw $4, 28($29) \n\t" \
+ "lw $4, 36(%1) \n\t" \
+ "sw $4, 32($29) \n\t" \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
- "addu $sp, $sp, 40 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
- "addu $sp, $sp, 8 \n\t" \
- "move %0, $v0\n" \
+ "addu $29, $29, 40 \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
+ "addu $29, $29, 8 \n\t" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4270,35 +4344,35 @@
_argvec[10] = (unsigned long)(arg10); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 48\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 24(%1) \n\t" \
- "sw $a0, 20($sp) \n\t" \
- "lw $a0, 28(%1) \n\t" \
- "sw $a0, 24($sp) \n\t" \
- "lw $a0, 32(%1) \n\t" \
- "sw $a0, 28($sp) \n\t" \
- "lw $a0, 36(%1) \n\t" \
- "sw $a0, 32($sp) \n\t" \
- "lw $a0, 40(%1) \n\t" \
- "sw $a0, 36($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 48\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 24(%1) \n\t" \
+ "sw $4, 20($29) \n\t" \
+ "lw $4, 28(%1) \n\t" \
+ "sw $4, 24($29) \n\t" \
+ "lw $4, 32(%1) \n\t" \
+ "sw $4, 28($29) \n\t" \
+ "lw $4, 36(%1) \n\t" \
+ "sw $4, 32($29) \n\t" \
+ "lw $4, 40(%1) \n\t" \
+ "sw $4, 36($29) \n\t" \
+ "lw $4, 4(%1) \n\t" \
+ "lw $5, 8(%1) \n\t" \
+ "lw $6, 12(%1) \n\t" \
+ "lw $7, 16(%1) \n\t" \
+ "lw $25, 0(%1) \n\t" /* target->t9 */ \
VALGRIND_CALL_NOREDIR_T9 \
- "addu $sp, $sp, 48 \n\t" \
- "lw $gp, 0($sp) \n\t" \
- "lw $ra, 4($sp) \n\t" \
- "addu $sp, $sp, 8 \n\t" \
- "move %0, $v0\n" \
+ "addu $29, $29, 48 \n\t" \
+ "lw $28, 0($29) \n\t" \
+ "lw $31, 4($29) \n\t" \
+ "addu $29, $29, 8 \n\t" \
+ "move %0, $2\n" \
: /*out*/ "=r" (_res) \
: /*in*/ "0" (&_argvec[0]) \
- : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ : /*trash*/ "memory", __CALLER_SAVED_REGS \
); \
lval = (__typeof__(lval)) _res; \
} while (0)
@@ -4324,37 +4398,37 @@
_argvec[11] = (unsigned long)(arg11); \
__asm__ volatile( \
"subu $29, $29, 8 \n\t" \
- "sw $gp, 0($sp) \n\t" \
- "sw $ra, 4($sp) \n\t" \
- "lw $a0, 20(%1) \n\t" \
- "subu $sp, $sp, 48\n\t" \
- "sw $a0, 16($sp) \n\t" \
- "lw $a0, 24(%1) \n\t" \
- "sw $a0, 20($sp) \n\t" \
- "lw $a0, 28(%1) \n\t" \
- "sw $a0, 24($sp) \n\t" \
- "lw $a0, 32(%1) \n\t" \
- "sw $a0, 28($sp) \n\t" \
- "lw $a0, 36(%1) \n\t" \
- "sw $a0, 32($sp) \n\t" \
- "lw $a0, 40(%1) \n\t" \
- "sw $a0, 36($sp) \n\t" \
- "lw $a0, 44(%1) \n\t" \
- "sw $a0, 40($sp) \n\t" \
- "lw $a0, 4(%1) \n\t" \
- "lw $a1, 8(%1) \n\t" \
- "lw $a2, 12(%1) \n\t" \
- "lw $a3, 16(%1) \n\t" \
- "lw $t9, 0(%1) \n\t" /* target->t9 */ \
+ "sw $28, 0($29) \n\t" \
+ "sw $31, 4($29) \n\t" \
+ "lw $4, 20(%1) \n\t" \
+ "subu $29, $29, 48\n\t" \
+ "sw $4, 16($29) \n\t" \
+ "lw $4, 24(%1) \n\t" \
+ "sw $4, 20($29) \n\t" \
+ "lw $4, 28(%1) \n\t" \
+ "sw $4, 24($29) \n\t" \
+ "l...
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