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From: <sv...@va...> - 2013-01-29 22:14:14
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sewardj 2013-01-29 22:14:01 +0000 (Tue, 29 Jan 2013)
New Revision: 13279
Log:
test_reservation(), test_double_pair_instrs(): Fix broken inline assembly
causing segfaults with gcc-4.7. The inline assembly still isn't right,
but it's better than it was before.
Modified files:
trunk/memcheck/tests/ppc32/power_ISA2_05.c
trunk/memcheck/tests/ppc64/power_ISA2_05.c
Modified: trunk/memcheck/tests/ppc32/power_ISA2_05.c (+7 -7)
===================================================================
--- trunk/memcheck/tests/ppc32/power_ISA2_05.c 2013-01-29 21:14:46 +00:00 (rev 13278)
+++ trunk/memcheck/tests/ppc32/power_ISA2_05.c 2013-01-29 22:14:01 +00:00 (rev 13279)
@@ -103,8 +103,8 @@
FRT2 = -1.0;
base = (unsigned long) &dbl_pair;
offset = (unsigned long) &dbl_pair[1] - base;
- __asm__ volatile ("or 20, 0, %0"::"r" (base));
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lfdpx 10, 20, 21");
__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
@@ -115,8 +115,8 @@
FRT2 = -16.1024;
base = (unsigned long) &dbl_pair;
offset = (unsigned long) &dbl_pair[2] - base;
- __asm__ volatile ("or 20, 0, %0"::"r" (base));
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
__asm__ volatile ("stfdpx 10, 20, 21");
@@ -168,14 +168,14 @@
base = (unsigned long) &arr;
offset = (unsigned long) &arr[1] - base;
- __asm__ volatile ("or 20, 0, %0"::"r" (base));
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
printf("lwarx => %x\n", RT);
#ifdef __powerpc64__
offset = (unsigned long) &arr[1] - base;
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
printf("ldarx => %x\n", RT);
#endif
Modified: trunk/memcheck/tests/ppc64/power_ISA2_05.c (+7 -7)
===================================================================
--- trunk/memcheck/tests/ppc64/power_ISA2_05.c 2013-01-29 21:14:46 +00:00 (rev 13278)
+++ trunk/memcheck/tests/ppc64/power_ISA2_05.c 2013-01-29 22:14:01 +00:00 (rev 13279)
@@ -101,8 +101,8 @@
FRT2 = -1.0;
base = (unsigned long) &dbl_pair;
offset = (unsigned long) &dbl_pair[1] - base;
- __asm__ volatile ("or 20, 0, %0"::"r" (base));
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lfdpx 10, 20, 21");
__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
@@ -113,8 +113,8 @@
FRT2 = -16.1024;
base = (unsigned long) &dbl_pair;
offset = (unsigned long) &dbl_pair[2] - base;
- __asm__ volatile ("or 20, 0, %0"::"r" (base));
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
__asm__ volatile ("stfdpx 10, 20, 21");
@@ -166,14 +166,14 @@
base = (unsigned long) &arr;
offset = (unsigned long) &arr[1] - base;
- __asm__ volatile ("or 20, 0, %0"::"r" (base));
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
printf("lwarx => %x\n", RT);
#ifdef __powerpc64__
offset = (unsigned long) &arr[1] - base;
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
printf("ldarx => %x\n", RT);
#endif
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