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From: <sv...@va...> - 2013-01-29 15:42:41
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petarj 2013-01-29 15:42:29 +0000 (Tue, 29 Jan 2013)
New Revision: 2669
Log:
Follow-up on r2664-r2668 changes for IRExpr_Mux0X and Iex_Mux0X for MIPS32.
Modified files:
trunk/priv/guest_mips_toIR.c
trunk/priv/host_mips_isel.c
Modified: trunk/priv/host_mips_isel.c (+27 -5)
===================================================================
--- trunk/priv/host_mips_isel.c 2013-01-29 03:56:06 +00:00 (rev 2668)
+++ trunk/priv/host_mips_isel.c 2013-01-29 15:42:29 +00:00 (rev 2669)
@@ -1424,7 +1424,7 @@
case Iex_ITE: {
if ((ty == Ity_I8 || ty == Ity_I16 ||
ty == Ity_I32 || ((ty == Ity_I64))) &&
- typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I8) {
+ typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1) {
/*
* r_dst = cond && rX
* cond = not(cond)
@@ -1433,12 +1433,19 @@
*/
HReg r0 = iselWordExpr_R(env, e->Iex.ITE.iffalse);
HReg r1 = iselWordExpr_R(env, e->Iex.ITE.iftrue);
- HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
+ HReg r_cond_1 = iselWordExpr_R(env, e->Iex.ITE.cond);
+ HReg r_cond = newVRegI(env);
+ HReg mask = newVRegI(env);
HReg r_dst = newVRegI(env);
HReg r_tmp = newVRegI(env);
HReg r_tmp1 = newVRegI(env);
HReg r_cond_neg = newVRegI(env);
+ /* r_cond = 0 - r_cond_1 */
+ addInstr(env, MIPSInstr_LI(mask, 0x0));
+ addInstr(env, MIPSInstr_Alu(Malu_SUB, r_cond,
+ mask, MIPSRH_Reg(r_cond_1)));
+
addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp, r_cond, MIPSRH_Reg(r1)));
addInstr(env, MIPSInstr_Alu(Malu_NOR, r_cond_neg, r_cond,
MIPSRH_Reg(r_cond)));
@@ -1954,17 +1961,25 @@
/* 64-bit ITE */
if (e->tag == Iex_ITE) {
+ vassert(typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1);
HReg expr0Lo, expr0Hi;
HReg expr1Lo, expr1Hi;
HReg tmpHi = newVRegI(env);
HReg tmpLo = newVRegI(env);
HReg tmp1Hi = newVRegI(env);
HReg tmp1Lo = newVRegI(env);
- HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
+ HReg r_cond_1 = iselWordExpr_R(env, e->Iex.ITE.cond);
+ HReg r_cond = newVRegI(env);
HReg r_cond_neg = newVRegI(env);
+ HReg mask = newVRegI(env);
HReg desLo = newVRegI(env);
HReg desHi = newVRegI(env);
+ /* r_cond = 0 - r_cond_1 */
+ addInstr(env, MIPSInstr_LI(mask, 0x0));
+ addInstr(env, MIPSInstr_Alu(Malu_SUB, r_cond,
+ mask, MIPSRH_Reg(r_cond_1)));
+
/* expr0Hi:expr0Lo = iffalse */
/* expr1Hi:expr1Lo = iftrue */
iselInt64Expr(&expr0Hi, &expr0Lo, env, e->Iex.ITE.iffalse);
@@ -2678,11 +2693,13 @@
/* --------- MULTIPLEX --------- */
if (e->tag == Iex_ITE) {
if (ty == Ity_F64
- && typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I8) {
+ && typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1) {
HReg r0 = iselDblExpr(env, e->Iex.ITE.iffalse);
HReg r1 = iselDblExpr(env, e->Iex.ITE.iftrue);
- HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
+ HReg r_cond_1 = iselWordExpr_R(env, e->Iex.ITE.cond);
+ HReg r_cond = newVRegI(env);
HReg r_cond_neg = newVRegI(env);
+ HReg mask = newVRegI(env);
HReg r_dst = newVRegD(env);
HReg r_tmp_lo = newVRegI(env);
HReg r_tmp_hi = newVRegI(env);
@@ -2695,6 +2712,11 @@
HReg r_dst_lo = newVRegI(env);
HReg r_dst_hi = newVRegI(env);
+ /* r_cond = 0 - r_cond_1 */
+ addInstr(env, MIPSInstr_LI(mask, 0x0));
+ addInstr(env, MIPSInstr_Alu(Malu_SUB, r_cond,
+ mask, MIPSRH_Reg(r_cond_1)));
+
sub_from_sp(env, 16); // Move SP down 16 bytes
MIPSAMode *am_addr = MIPSAMode_IR(0, StackPointer(mode64));
Modified: trunk/priv/guest_mips_toIR.c (+64 -92)
===================================================================
--- trunk/priv/guest_mips_toIR.c 2013-01-29 03:56:06 +00:00 (rev 2668)
+++ trunk/priv/guest_mips_toIR.c 2013-01-29 15:42:29 +00:00 (rev 2669)
@@ -320,8 +320,7 @@
#define FP_CONDITIONAL_CODE \
t3 = newTemp(Ity_I32); \
assign(t3, binop(Iop_And32, \
- IRExpr_ITE( unop(Iop_1Uto8, \
- binop(Iop_CmpEQ32, mkU32(cc), mkU32(0))), \
+ IRExpr_ITE( binop(Iop_CmpEQ32, mkU32(cc), mkU32(0)), \
binop(Iop_Shr32, getFCSR(), mkU8(23)), \
binop(Iop_Shr32, getFCSR(), mkU8(24+cc))), \
mkU32(0x1)));
@@ -1381,13 +1380,12 @@
{
DIP("tf: %d, nd: %d\n", tf, nd);
//FcConditionalCode(bc1_cc)
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
t3 = newTemp(Ity_I1);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkU32(bc1_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(bc1_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -1610,16 +1608,14 @@
t1 = newTemp(Ity_F64);
t2 = newTemp(Ity_F64);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
assign(t1, unop(Iop_F32toF64, getFReg(fs)));
assign(t2, unop(Iop_F32toF64, getFReg(fd)));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpNE32, mkU32(0),
- getIReg(rt))));
+ assign(t3, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
- mkexpr(t1), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3), mkexpr(t1), mkexpr(t2)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
@@ -1627,13 +1623,11 @@
case 0x11: // D
DIP("movn.d f%d, f%d, r%d", fd, fs, rt);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpNE32, mkU32(0),
- getIReg(rt))));
- putDReg(fd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
- getDReg(fs), getDReg(fd)));
+ assign(t3, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
+ putDReg(fd, IRExpr_ITE(mkexpr(t3), getDReg(fs), getDReg(fd)));
break;
default:
goto decode_failure;
@@ -1647,15 +1641,13 @@
t1 = newTemp(Ity_F64);
t2 = newTemp(Ity_F64);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
assign(t1, unop(Iop_F32toF64, getFReg(fs)));
assign(t2, unop(Iop_F32toF64, getFReg(fd)));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- getIReg(rt))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
- mkexpr(t1), mkexpr(t2)));
+ assign(t3, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
+ assign(t4, IRExpr_ITE(mkexpr(t3), mkexpr(t1), mkexpr(t2)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
@@ -1664,13 +1656,11 @@
case 0x11: // D
DIP("movz.d f%d, f%d, r%d", fd, fs, rt);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- getIReg(rt))));
- putDReg(fd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
- getDReg(fs), getDReg(fd)));
+ assign(t3, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
+ putDReg(fd, IRExpr_ITE(mkexpr(t3), getDReg(fs), getDReg(fd)));
break;
default:
goto decode_failure;
@@ -1684,14 +1674,13 @@
{
case 0x11: // D
DIP("movt.d f%d, f%d, %d", fd, fs, mov_cc);
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkU32(mov_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(mov_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -1702,17 +1691,16 @@
mkU32(0x1))
));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
- mkexpr(t2))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ assign(t3, binop(Iop_CmpEQ32, mkU32(1), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3),
getDReg(fd), getDReg(fs)));
putDReg(fd, mkexpr(t4));
break;
case 0x10: // S
DIP("movt.s f%d, f%d, %d", fd, fs, mov_cc);
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
t5 = newTemp(Ity_F64);
t6 = newTemp(Ity_F64);
@@ -1721,9 +1709,8 @@
assign(t5, unop(Iop_F32toF64, getFReg(fs)));
assign(t6, unop(Iop_F32toF64, getFReg(fd)));
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkU32(mov_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(mov_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -1734,9 +1721,8 @@
mkU32(0x1))
));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
- mkexpr(t2))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ assign(t3, binop(Iop_CmpEQ32, mkU32(1), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3),
mkexpr(t6), mkexpr(t5)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
@@ -1752,14 +1738,13 @@
{
case 0x11: // D
DIP("movf.d f%d, f%d, %d", fd, fs, mov_cc);
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32,
- mkU32(0), mkU32(mov_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(mov_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -1770,18 +1755,17 @@
mkU32(0x1))
));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
- mkexpr(t2))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ assign(t3, binop(Iop_CmpEQ32, mkU32(1), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3),
getDReg(fs), getDReg(fd)));
putDReg(fd, mkexpr(t4));
break;
case 0x10: // S
DIP("movf.s f%d, f%d, %d", fd, fs, mov_cc);
{
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_F64);
t5 = newTemp(Ity_F64);
t6 = newTemp(Ity_F64);
@@ -1789,9 +1773,8 @@
assign(t5, unop(Iop_F32toF64, getFReg(fs)));
assign(t6, unop(Iop_F32toF64, getFReg(fd)));
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkU32(mov_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(mov_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -1802,9 +1785,8 @@
mkU32(0x1))
));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
- mkexpr(t2))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ assign(t3, binop(Iop_CmpEQ32, mkU32(1), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3),
mkexpr(t5), mkexpr(t6)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
@@ -2657,7 +2639,7 @@
t2 = newTemp(Ity_I32);
t3 = newTemp(Ity_I64);
t4 = newTemp(Ity_I32);
- t5 = newTemp(Ity_I32);
+ t5 = newTemp(Ity_I1);
t6 = newTemp(Ity_I32);
assign(t1, getHI());
@@ -2667,10 +2649,9 @@
assign(t4, unop(Iop_64to32, mkexpr(t3))); //new lo
//if lo<lo(mul) hi = hi - 1
- assign(t5, unop(Iop_1Sto32, binop(Iop_CmpLT32U, mkexpr(t2),
- mkexpr(t4))));
+ assign(t5, binop(Iop_CmpLT32U, mkexpr(t2), mkexpr(t4)));
- assign(t6, IRExpr_ITE(unop(Iop_32to8, mkexpr(t5)),
+ assign(t6, IRExpr_ITE(mkexpr(t5),
binop(Iop_Sub32, mkexpr(t1), mkU32(0x1)),
mkexpr(t1)));
@@ -2685,7 +2666,7 @@
t2 = newTemp(Ity_I32);
t3 = newTemp(Ity_I64);
t4 = newTemp(Ity_I32);
- t5 = newTemp(Ity_I32);
+ t5 = newTemp(Ity_I1);
t6 = newTemp(Ity_I32);
assign(t1, getHI());
@@ -2695,10 +2676,9 @@
assign(t4, unop(Iop_64to32, mkexpr(t3))); //new lo
//if lo<lo(mul) hi = hi - 1
- assign(t5, unop(Iop_1Sto32, binop(Iop_CmpLT32U, mkexpr(t2),
- mkexpr(t4))));
+ assign(t5, binop(Iop_CmpLT32U, mkexpr(t2), mkexpr(t4)));
- assign(t6, IRExpr_ITE(unop(Iop_32to8, mkexpr(t5)),
+ assign(t6, IRExpr_ITE(mkexpr(t5),
binop(Iop_Sub32, mkexpr(t1), mkU32(0x1)),
mkexpr(t1)));
@@ -2709,10 +2689,9 @@
case 0x20: { /* CLZ */
DIP("clz r%d, r%d", rd, rs);
- t1 = newTemp(Ity_I32);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, getIReg(rs),
- mkU32(0))));
- putIReg(rd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ t1 = newTemp(Ity_I1);
+ assign(t1, binop(Iop_CmpEQ32, getIReg(rs), mkU32(0)));
+ putIReg(rd, IRExpr_ITE(mkexpr(t1),
mkU32(0x00000020),
unop(Iop_Clz32, getIReg(rs))));
break;
@@ -2720,10 +2699,9 @@
case 0x21: { /* CLO */
DIP("clo r%d, r%d", rd, rs);
- t1 = newTemp(Ity_I32);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, getIReg(rs),
- mkU32(0xffffffff))));
- putIReg(rd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ t1 = newTemp(Ity_I1);
+ assign(t1, binop(Iop_CmpEQ32, getIReg(rs), mkU32(0xffffffff)));
+ putIReg(rd, IRExpr_ITE(mkexpr(t1),
mkU32(0x00000020),
unop(Iop_Clz32, unop(Iop_Not32, getIReg(rs)))));
break;
@@ -2875,14 +2853,13 @@
if (tf == 0) { /* MOVF */
DIP("movf r%d, r%d, %d", rd, rs, mov_cc);
{
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_I32);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkU32(mov_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(mov_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -2893,23 +2870,20 @@
mkU32(0x1))
));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkexpr(t2))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
- getIReg(rs), getIReg(rd)));
+ assign(t3, binop(Iop_CmpEQ32, mkU32(0), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3), getIReg(rs), getIReg(rd)));
putIReg(rd, mkexpr(t4));
}
} else if (tf == 1) { /* MOVT */
DIP("movt r%d, r%d, %d", rd, rs, mov_cc);
{
- t1 = newTemp(Ity_I32);
+ t1 = newTemp(Ity_I1);
t2 = newTemp(Ity_I32);
- t3 = newTemp(Ity_I32);
+ t3 = newTemp(Ity_I1);
t4 = newTemp(Ity_I32);
- assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
- mkU32(mov_cc))));
- assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), mkU32(mov_cc)));
+ assign(t2, IRExpr_ITE(mkexpr(t1),
binop(Iop_And32,
binop(Iop_Shr32, getFCSR(),
mkU8(23)),
@@ -2920,10 +2894,8 @@
mkU32(0x1))
));
- assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
- mkexpr(t2))));
- assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
- getIReg(rs), getIReg(rd)));
+ assign(t3, binop(Iop_CmpEQ32, mkU32(1), mkexpr(t2)));
+ assign(t4, IRExpr_ITE(mkexpr(t3), getIReg(rs), getIReg(rd)));
putIReg(rd, mkexpr(t4));
}
}
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