|
[Valgrind-developers] valgrind: r12628: Add a stackframe around
function call. Avoids testcase hangs
From: <sv...@va...> - 2012-06-09 16:19:43
|
florian 2012-06-09 17:19:31 +0100 (Sat, 09 Jun 2012)
New Revision: 12628
Log:
Add a stackframe around function call. Avoids testcase hangs
when compiled with -O3. Found and debugged by Christian.
Modified files:
trunk/none/tests/s390x/cgij.c
trunk/none/tests/s390x/cgrj.c
trunk/none/tests/s390x/cij.c
trunk/none/tests/s390x/clgij.c
trunk/none/tests/s390x/clgrj.c
trunk/none/tests/s390x/clij.c
trunk/none/tests/s390x/clrj.c
trunk/none/tests/s390x/crj.c
Modified: trunk/none/tests/s390x/cij.c (+16 -8)
===================================================================
--- trunk/none/tests/s390x/cij.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/cij.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -30,11 +30,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,NEVER,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -43,11 +44,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,ALWAYS,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -56,11 +58,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,LE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -69,11 +72,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,GE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -82,11 +86,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,GT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -95,11 +100,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,LT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -108,11 +114,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,EQ,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -121,11 +128,12 @@
register int32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CIJ(7,NE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/cgij.c (+16 -8)
===================================================================
--- trunk/none/tests/s390x/cgij.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/cgij.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -30,11 +30,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,NEVER,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -43,11 +44,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,ALWAYS,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -56,11 +58,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,LE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -69,11 +72,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,GE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -82,11 +86,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,GT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -95,11 +100,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,LT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -108,11 +114,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,EQ,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -121,11 +128,12 @@
register int64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CGIJ(7,NE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/clgrj.c (+24 -8)
===================================================================
--- trunk/none/tests/s390x/clgrj.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/clgrj.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -31,11 +31,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,NEVER) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -45,11 +47,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,ALWAYS) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -59,11 +63,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,LE) "\n\t"
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -73,11 +79,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,GE) "\n\t"
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -87,11 +95,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,GT) "\n\t"
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -101,11 +111,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,LT) "\n\t"
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -115,11 +127,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,EQ) "\n\t"
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -129,11 +143,13 @@
register uint64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLGRJ(7,8,8,NE) "\n\t"
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/clgij.c (+16 -8)
===================================================================
--- trunk/none/tests/s390x/clgij.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/clgij.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -30,11 +30,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,NEVER,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -43,11 +44,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,ALWAYS,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -56,11 +58,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,LE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -69,11 +72,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,GE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -82,11 +86,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,GT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -95,11 +100,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,LT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -108,11 +114,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,EQ,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -121,11 +128,12 @@
register uint64_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLGIJ(7,NE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/clrj.c (+24 -8)
===================================================================
--- trunk/none/tests/s390x/clrj.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/clrj.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -31,11 +31,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,NEVER) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -45,11 +47,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,ALWAYS) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -59,11 +63,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,LE) "\n\t"
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -73,11 +79,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,GE) "\n\t"
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -87,11 +95,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,GT) "\n\t"
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -101,11 +111,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,LT) "\n\t"
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -115,11 +127,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,EQ) "\n\t"
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -129,11 +143,13 @@
register uint32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CLRJ(7,8,8,NE) "\n\t"
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/crj.c (+24 -8)
===================================================================
--- trunk/none/tests/s390x/crj.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/crj.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -31,11 +31,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,NEVER) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -45,11 +47,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,ALWAYS) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -59,11 +63,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,LE) "\n\t"
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -73,11 +79,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,GE) "\n\t"
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -87,11 +95,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,GT) "\n\t"
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -101,11 +111,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,LT) "\n\t"
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -115,11 +127,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,EQ) "\n\t"
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -129,11 +143,13 @@
register int32_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CRJ(7,8,8,NE) "\n\t"
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/clij.c (+16 -8)
===================================================================
--- trunk/none/tests/s390x/clij.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/clij.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -30,11 +30,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,NEVER,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -43,11 +44,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,ALWAYS,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -56,11 +58,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,LE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -69,11 +72,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,GE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -82,11 +86,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,GT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -95,11 +100,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,LT,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -108,11 +114,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,EQ,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
@@ -121,11 +128,12 @@
register uint32_t val asm("r7") = value;
asm volatile(
+ "aghi 15,-160\n\t"
CLIJ(7,NE,8,2a) "\n\t" /* 0x2a == 42 */
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t" : : "d"(val) : "15", BRASLCLOBBER);
return;
}
Modified: trunk/none/tests/s390x/cgrj.c (+24 -8)
===================================================================
--- trunk/none/tests/s390x/cgrj.c 2012-06-09 10:31:43 +01:00 (rev 12627)
+++ trunk/none/tests/s390x/cgrj.c 2012-06-09 17:19:31 +01:00 (rev 12628)
@@ -31,11 +31,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,NEVER) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -45,11 +47,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,ALWAYS) "\n\t"
"brasl 14,if_not_taken\n\t"
"j 0f\n\t"
"brasl 14,if_taken\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -59,11 +63,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,LE) "\n\t"
"brasl 14,if_gt\n\t"
"j 0f\n\t"
"brasl 14,if_le\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -73,11 +79,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,GE) "\n\t"
"brasl 14,if_lt\n\t"
"j 0f\n\t"
"brasl 14,if_ge\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -87,11 +95,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,GT) "\n\t"
"brasl 14,if_le\n\t"
"j 0f\n\t"
"brasl 14,if_gt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -101,11 +111,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,LT) "\n\t"
"brasl 14,if_ge\n\t"
"j 0f\n\t"
"brasl 14,if_lt\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -115,11 +127,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,EQ) "\n\t"
"brasl 14,if_ne\n\t"
"j 0f\n\t"
"brasl 14,if_eq\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
@@ -129,11 +143,13 @@
register int64_t val2 asm("r8") = value2;
asm volatile(
+ "aghi 15,-160\n\t"
CGRJ(7,8,8,NE) "\n\t"
"brasl 14,if_eq\n\t"
"j 0f\n\t"
"brasl 14,if_ne\n\t"
- "0: nopr 0\n\t" : : "d"(val1), "d"(val2) : BRASLCLOBBER);
+ "0: aghi 15,160\n\t"
+ : : "d"(val1), "d"(val2) : "15", BRASLCLOBBER);
return;
}
|