|
From: <sv...@va...> - 2012-04-23 09:48:24
|
sewardj 2012-04-23 10:48:14 +0100 (Mon, 23 Apr 2012)
New Revision: 2311
Log:
For each backend, unify the sets of IRJumpKinds handled for Ist_Exit
and iselNext, so as to avoid potential failures caused by branch sense
switching at the IR level.
Modified files:
trunk/priv/host_amd64_isel.c
trunk/priv/host_arm_isel.c
trunk/priv/host_ppc_isel.c
trunk/priv/host_x86_isel.c
Modified: trunk/priv/host_arm_isel.c (+9 -6)
===================================================================
--- trunk/priv/host_arm_isel.c 2012-04-22 20:25:39 +01:00 (rev 2310)
+++ trunk/priv/host_arm_isel.c 2012-04-23 10:48:14 +01:00 (rev 2311)
@@ -6008,9 +6008,11 @@
/* Case: assisted transfer to arbitrary address */
switch (stmt->Ist.Exit.jk) {
- //case Ijk_MapFail:
- //case Ijk_SigSEGV: case Ijk_TInval: case Ijk_EmWarn:
+ /* Keep this list in sync with that in iselNext below */
+ case Ijk_ClientReq:
case Ijk_NoDecode:
+ case Ijk_NoRedir:
+ case Ijk_Sys_syscall:
{
HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
addInstr(env, ARMInstr_XAssisted(r, amR15T, cc,
@@ -6094,12 +6096,13 @@
break;
}
- /* Case: some other kind of transfer to any address */
+ /* Case: assisted transfer to arbitrary address */
switch (jk) {
- case Ijk_Sys_syscall: case Ijk_ClientReq: case Ijk_NoDecode:
+ /* Keep this list in sync with that for Ist_Exit above */
+ case Ijk_ClientReq:
+ case Ijk_NoDecode:
case Ijk_NoRedir:
- //case Ijk_Sys_int128:
- //case Ijk_Yield: case Ijk_SigTRAP:
+ case Ijk_Sys_syscall:
{
HReg r = iselIntExpr_R(env, next);
ARMAMode1* amR15T = ARMAMode1_RI(hregARM_R8(), offsIP);
Modified: trunk/priv/host_x86_isel.c (+29 -6)
===================================================================
--- trunk/priv/host_x86_isel.c 2012-04-22 20:25:39 +01:00 (rev 2310)
+++ trunk/priv/host_x86_isel.c 2012-04-23 10:48:14 +01:00 (rev 2311)
@@ -4085,8 +4085,21 @@
/* Case: assisted transfer to arbitrary address */
switch (stmt->Ist.Exit.jk) {
+ /* Keep this list in sync with that in iselNext below */
+ case Ijk_ClientReq:
+ case Ijk_EmWarn:
case Ijk_MapFail:
- case Ijk_SigSEGV: case Ijk_TInval: case Ijk_EmWarn: {
+ case Ijk_NoDecode:
+ case Ijk_NoRedir:
+ case Ijk_SigSEGV:
+ case Ijk_SigTRAP:
+ case Ijk_Sys_int128:
+ case Ijk_Sys_int129:
+ case Ijk_Sys_int130:
+ case Ijk_Sys_sysenter:
+ case Ijk_TInval:
+ case Ijk_Yield:
+ {
HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
addInstr(env, X86Instr_XAssisted(r, amEIP, cc, stmt->Ist.Exit.jk));
return;
@@ -4168,13 +4181,23 @@
break;
}
- /* Case: some other kind of transfer to any address */
+ /* Case: assisted transfer to arbitrary address */
switch (jk) {
+ /* Keep this list in sync with that for Ist_Exit above */
+ case Ijk_ClientReq:
+ case Ijk_EmWarn:
+ case Ijk_MapFail:
case Ijk_NoDecode:
- case Ijk_Sys_int128: case Ijk_Sys_int129: case Ijk_Sys_int130:
- case Ijk_ClientReq: case Ijk_NoRedir:
- case Ijk_Yield: case Ijk_SigTRAP: case Ijk_TInval:
- case Ijk_Sys_sysenter: {
+ case Ijk_NoRedir:
+ case Ijk_SigSEGV:
+ case Ijk_SigTRAP:
+ case Ijk_Sys_int128:
+ case Ijk_Sys_int129:
+ case Ijk_Sys_int130:
+ case Ijk_Sys_sysenter:
+ case Ijk_TInval:
+ case Ijk_Yield:
+ {
HReg r = iselIntExpr_R(env, next);
X86AMode* amEIP = X86AMode_IR(offsIP, hregX86_EBP());
addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS, jk));
Modified: trunk/priv/host_ppc_isel.c (+19 -8)
===================================================================
--- trunk/priv/host_ppc_isel.c 2012-04-22 20:25:39 +01:00 (rev 2310)
+++ trunk/priv/host_ppc_isel.c 2012-04-23 10:48:14 +01:00 (rev 2311)
@@ -4736,10 +4736,16 @@
/* Case: assisted transfer to arbitrary address */
switch (stmt->Ist.Exit.jk) {
- //case Ijk_MapFail:
- //case Ijk_SigSEGV: case Ijk_TInval: case Ijk_EmWarn:
- case Ijk_NoDecode: case Ijk_SigBUS: case Ijk_SigTRAP:
+ /* Keep this list in sync with that in iselNext below */
+ case Ijk_ClientReq:
case Ijk_EmFail:
+ case Ijk_EmWarn:
+ case Ijk_NoDecode:
+ case Ijk_NoRedir:
+ case Ijk_SigBUS:
+ case Ijk_SigTRAP:
+ case Ijk_Sys_syscall:
+ case Ijk_TInval:
{
HReg r = iselWordExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
addInstr(env, PPCInstr_XAssisted(r, amCIA, cc,
@@ -4828,13 +4834,18 @@
break;
}
- /* Case: some other kind of transfer to any address */
+ /* Case: assisted transfer to arbitrary address */
switch (jk) {
- case Ijk_Sys_syscall: case Ijk_ClientReq: case Ijk_NoDecode:
- case Ijk_EmWarn: case Ijk_SigTRAP: case Ijk_TInval:
+ /* Keep this list in sync with that for Ist_Exit above */
+ case Ijk_ClientReq:
+ case Ijk_EmFail:
+ case Ijk_EmWarn:
+ case Ijk_NoDecode:
case Ijk_NoRedir:
- //case Ijk_Sys_int128:
- //case Ijk_Yield:
+ case Ijk_SigBUS:
+ case Ijk_SigTRAP:
+ case Ijk_Sys_syscall:
+ case Ijk_TInval:
{
HReg r = iselWordExpr_R(env, next);
PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
Modified: trunk/priv/host_amd64_isel.c (+21 -4)
===================================================================
--- trunk/priv/host_amd64_isel.c 2012-04-22 20:25:39 +01:00 (rev 2310)
+++ trunk/priv/host_amd64_isel.c 2012-04-23 10:48:14 +01:00 (rev 2311)
@@ -4177,7 +4177,17 @@
/* Case: assisted transfer to arbitrary address */
switch (stmt->Ist.Exit.jk) {
- case Ijk_SigSEGV: case Ijk_TInval: case Ijk_EmWarn: {
+ /* Keep this list in sync with that in iselNext below */
+ case Ijk_ClientReq:
+ case Ijk_EmWarn:
+ case Ijk_NoDecode:
+ case Ijk_NoRedir:
+ case Ijk_SigSEGV:
+ case Ijk_SigTRAP:
+ case Ijk_Sys_syscall:
+ case Ijk_TInval:
+ case Ijk_Yield:
+ {
HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
addInstr(env, AMD64Instr_XAssisted(r, amRIP, cc, stmt->Ist.Exit.jk));
return;
@@ -4260,11 +4270,18 @@
break;
}
- /* Case: some other kind of transfer to any address */
+ /* Case: assisted transfer to arbitrary address */
switch (jk) {
+ /* Keep this list in sync with that for Ist_Exit above */
+ case Ijk_ClientReq:
+ case Ijk_EmWarn:
case Ijk_NoDecode:
- case Ijk_Sys_syscall: case Ijk_ClientReq: case Ijk_NoRedir:
- case Ijk_Yield: case Ijk_SigTRAP: case Ijk_TInval: {
+ case Ijk_NoRedir:
+ case Ijk_SigSEGV:
+ case Ijk_SigTRAP:
+ case Ijk_Sys_syscall:
+ case Ijk_TInval:
+ case Ijk_Yield: {
HReg r = iselIntExpr_R(env, next);
AMD64AMode* amRIP = AMD64AMode_IR(offsIP, hregAMD64_RBP());
addInstr(env, AMD64Instr_XAssisted(r, amRIP, Acc_ALWAYS, jk));
|