|
From: Frank T. <s14...@ma...> - 2011-04-10 14:31:09
|
Hello, does VEX handle atomic instructions so that it's still atomic in the re- translated machinecode? I had a brief look into the code and saw that some instructions with a prefixed lock are handled. At least that's what the comment on VEX/priv/guest_x86_toIR.c:160 says. I'm just interested in x86 for now. A small test with xchg resulted in a lock cmpxchg which looks semantically equivalent (eax==dest). So, what's the official status? Does VEX handle atomicity? Regards, Frank. |
|
From: Julian S. <js...@ac...> - 2011-04-10 20:27:27
|
> does VEX handle atomic instructions so that it's still atomic in the re- > translated machinecode? Yes. At least since version 3.5.0 they do. memcheck/tests/atomic_incs.c tests it. J |