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From: <sv...@va...> - 2008-05-01 10:10:20
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Author: sewardj
Date: 2008-05-01 11:10:22 +0100 (Thu, 01 May 2008)
New Revision: 1829
Log:
Insist on guest state areas, shadows and spill areas having 16-byte
size and alignments (so far x86 and amd64 only).
Modified:
branches/OTRACK_BY_INSTRUMENTATION/priv/host-generic/reg_alloc2.c
branches/OTRACK_BY_INSTRUMENTATION/pub/libvex.h
branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h
branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_x86.h
Modified: branches/OTRACK_BY_INSTRUMENTATION/priv/host-generic/reg_alloc2.c
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/priv/host-generic/reg_alloc2.c 2008-04-30 09:59:24 UTC (rev 1828)
+++ branches/OTRACK_BY_INSTRUMENTATION/priv/host-generic/reg_alloc2.c 2008-05-01 10:10:22 UTC (rev 1829)
@@ -397,7 +397,7 @@
Bool do_sanity_check;
vassert(0 == LibVEX_N_SPILL_BYTES % 16);
- vassert(0 == guest_sizeB % 8);
+ vassert(0 == guest_sizeB % 16);
/* The live range numbers are signed shorts, and so limiting the
number of insns to 10000 comfortably guards against them
Modified: branches/OTRACK_BY_INSTRUMENTATION/pub/libvex.h
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/pub/libvex.h 2008-04-30 09:59:24 UTC (rev 1828)
+++ branches/OTRACK_BY_INSTRUMENTATION/pub/libvex.h 2008-05-01 10:10:22 UTC (rev 1829)
@@ -335,14 +335,18 @@
/* A note about guest state layout.
LibVEX defines the layout for the guest state, in the file
- pub/libvex_guest_<arch>.h. The struct will have an 8-aligned size.
- Each translated bb is assumed to be entered with a specified
- register pointing at such a struct. Beyond that is a shadow
- state area with the same size as the struct. Beyond that is
- a spill area that LibVEX may spill into. It must have size
+ pub/libvex_guest_<arch>.h. The struct will have an 16-aligned
+ size. Each translated bb is assumed to be entered with a specified
+ register pointing at such a struct. Beyond that is two copies of
+ the shadow state area with the same size as the struct. Beyond
+ that is a spill area that LibVEX may spill into. It must have size
LibVEX_N_SPILL_BYTES, and this must be a 16-aligned number.
- On entry, the baseblock pointer register must be 8-aligned.
+ On entry, the baseblock pointer register must be 16-aligned.
+
+ There must be no holes in between the primary guest state, its two
+ copies, and the spill area. In short, all 4 areas must have a
+ 16-aligned size and be 16-aligned, and placed back-to-back.
*/
#define LibVEX_N_SPILL_BYTES 2048
Modified: branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h 2008-04-30 09:59:24 UTC (rev 1828)
+++ branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h 2008-05-01 10:10:22 UTC (rev 1829)
@@ -152,8 +152,8 @@
replace-style ones. */
ULong guest_NRADDR;
- /* Padding to make it have an 8-aligned size */
- /* UInt padding; */
+ /* Padding to make it have an 16-aligned size */
+ ULong padding;
}
VexGuestAMD64State;
Modified: branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_x86.h
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_x86.h 2008-04-30 09:59:24 UTC (rev 1828)
+++ branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_x86.h 2008-05-01 10:10:22 UTC (rev 1829)
@@ -220,7 +220,7 @@
replace-style ones. */
UInt guest_NRADDR;
- /* Padding to make it have an 8-aligned size */
+ /* Padding to make it have an 16-aligned size */
UInt padding;
}
VexGuestX86State;
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