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From: <sv...@va...> - 2008-04-09 01:03:11
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Author: sewardj
Date: 2008-04-09 02:03:14 +0100 (Wed, 09 Apr 2008)
New Revision: 1823
Log:
* 32-bit PowerPC: handle Max32U. Believed to be good also for 64-bit
PowerPC, although untested.
* 32-bit PowerPC: handle Left64. This should be merged to 3.3.X & trunk
since the lack of it causes even standard (non-origin-tracking) Memcheck
to assert on some obscure Altivec instructions.
Modified:
branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/hdefs.h
branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/isel.c
Modified: branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/hdefs.h
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/hdefs.h 2008-04-09 00:59:48 UTC (rev 1822)
+++ branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/hdefs.h 2008-04-09 01:03:14 UTC (rev 1823)
@@ -288,7 +288,7 @@
PPCRI;
extern PPCRI* PPCRI_Imm ( ULong );
-extern PPCRI* PPCRI_Reg ( HReg );
+extern PPCRI* PPCRI_Reg( HReg );
extern void ppPPCRI ( PPCRI* );
Modified: branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/isel.c
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/isel.c 2008-04-09 00:59:48 UTC (rev 1822)
+++ branches/OTRACK_BY_INSTRUMENTATION/priv/host-ppc/isel.c 2008-04-09 01:03:14 UTC (rev 1823)
@@ -1367,6 +1367,18 @@
return dst;
}
+ if (e->Iex.Binop.op == Iop_Max32U) {
+ HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
+ HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
+ HReg rdst = newVRegI(env);
+ PPCCondCode cc = mk_PPCCondCode( Pct_TRUE, Pcf_7LT );
+ addInstr(env, mk_iMOVds_RR(rdst, r1));
+ addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
+ 7/*cr*/, rdst, PPCRH_Reg(r2)));
+ addInstr(env, PPCInstr_CMov(cc, rdst, PPCRI_Reg(r2)));
+ return rdst;
+ }
+
if (e->Iex.Binop.op == Iop_32HLto64) {
HReg r_Hi = iselWordExpr_R(env, e->Iex.Binop.arg1);
HReg r_Lo = iselWordExpr_R(env, e->Iex.Binop.arg2);
@@ -1908,7 +1920,7 @@
addInstr(env, mk_iMOVds_RR(r_dst,rX));
addInstr(env, PPCInstr_Alu(Palu_AND, r_tmp,
r_cond, PPCRH_Imm(False,0xFF)));
- addInstr(env, PPCInstr_Cmp(False/*unsined*/, True/*32bit cmp*/,
+ addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
7/*cr*/, r_tmp, PPCRH_Imm(False,0)));
addInstr(env, PPCInstr_CMov(cc,r_dst,r0));
return r_dst;
@@ -2672,7 +2684,7 @@
return;
}
- /* Add64/Sub64 */
+ /* Add64 */
case Iop_Add64: {
HReg xLo, xHi, yLo, yHi;
HReg tLo = newVRegI(env);
@@ -2751,6 +2763,28 @@
return;
}
+ /* Left64 */
+ case Iop_Left64: {
+ HReg argHi, argLo;
+ HReg zero32 = newVRegI(env);
+ HReg resHi = newVRegI(env);
+ HReg resLo = newVRegI(env);
+ iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
+ vassert(env->mode64 == False);
+ addInstr(env, PPCInstr_LI(zero32, 0, env->mode64));
+ /* resHi:resLo = - argHi:argLo */
+ addInstr(env, PPCInstr_AddSubC( False/*sub*/, True/*set carry*/,
+ resLo, zero32, argLo ));
+ addInstr(env, PPCInstr_AddSubC( False/*sub*/, False/*read carry*/,
+ resHi, zero32, argHi ));
+ /* resHi:resLo |= srcHi:srcLo */
+ addInstr(env, PPCInstr_Alu(Palu_OR, resLo, resLo, PPCRH_Reg(argLo)));
+ addInstr(env, PPCInstr_Alu(Palu_OR, resHi, resHi, PPCRH_Reg(argHi)));
+ *rHi = resHi;
+ *rLo = resLo;
+ return;
+ }
+
/* 32Sto64(e) */
case Iop_32Sto64: {
HReg tHi = newVRegI(env);
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